| 12424549 |
Skip-level TSV with hybrid dielectric scheme for backside power delivery |
Nicholas Anthony Lanzillo, Ruilong Xie, Huai Huang, Lawrence A. Clevenger |
2025-09-23 |
| 12424557 |
Dual structured buried rail |
Huai Huang, Nicholas Anthony Lanzillo, Ruilong Xie, Lawrence A. Clevenger |
2025-09-23 |
| 12417926 |
Circuit interconnect structure |
Sagarika Mukesh, Fee Li Lie, Devika Sarkar Grant |
2025-09-16 |
| 12417963 |
Isolation rail between backside power rails |
Nicholas Anthony Lanzillo, Lawrence A. Clevenger, Ruilong Xie, Baozhen Li |
2025-09-16 |
| 12412836 |
Backside power plane |
Ruilong Xie, Nicholas Anthony Lanzillo, Lawrence A. Clevenger, Huai Huang |
2025-09-09 |
| 12334442 |
Dielectric caps for power and signal line routing |
Nicholas Anthony Lanzillo, Ruilong Xie, Lawrence A. Clevenger, Huai Huang |
2025-06-17 |
| 12334398 |
Multilayer dielectric stack for damascene top-via integration |
Sagarika Mukesh, Devika Sarkar Grant, Fee Li Lie, Shravan Kumar Matham, Gauri Karve |
2025-06-17 |
| 12266607 |
Bottom barrier free interconnects without voids |
Kenneth Chun Kuen Cheng, Koichi Motoyama, Kisik Choi, Cornelius Brown Peethala, Joe Lee |
2025-04-01 |
| 12261056 |
Top via patterning using metal as hard mask and via conductor |
Nicholas Anthony Lanzillo, Huai Huang, Lawrence A. Clevenger, Chanro Park |
2025-03-25 |
| 12218003 |
Selective ILD deposition for fully aligned via with airgap |
Christopher J. Penny, Benjamin D. Briggs, Huai Huang, Lawrence A. Clevenger, Michael Rizzolo |
2025-02-04 |
| 12148699 |
High aspect ratio buried power rail metallization |
Sagarika Mukesh, Devika Sarkar Grant, Fee Li Lie, Thamarai S. Devarajan, Aakrati Jain |
2024-11-19 |
| 11804405 |
Method of forming copper interconnect structure with manganese barrier layer |
Daniel C. Edelstein, Son V. Nguyen, Takeshi Nogami, Deepika Priyadarshini |
2023-10-31 |
| 11756786 |
Forming high carbon content flowable dielectric film with low processing damage |
Benjamin D. Briggs, Donald F. Canaperi, Huy Cao, Thomas J. Haigh, Jr., Son V. Nguyen +2 more |
2023-09-12 |
| 11756887 |
Backside floating metal for increased capacitance |
Nicholas Anthony Lanzillo, Huai Huang, Lawrence A. Clevenger |
2023-09-12 |
| 11676854 |
Selective ILD deposition for fully aligned via with airgap |
Christopher J. Penny, Benjamin D. Briggs, Huai Huang, Lawrence A. Clevenger, Michael Rizzolo |
2023-06-13 |
| 11621189 |
Barrier-less prefilled via formation |
Nicholas Anthony Lanzillo, Junli Wang, Lawrence A. Clevenger, Christopher J. Penny, Robert R. Robison +1 more |
2023-04-04 |
| 11569134 |
Wafer backside engineering for wafer stress control |
Nikhil Jain, Hsueh-Chung Chen, Mary Claire Silvestre |
2023-01-31 |
| 11315827 |
Skip via connection between metallization levels |
Huai Huang, Lawrence A. Clevenger, Christopher J. Penny, Nicholas Anthony Lanzillo |
2022-04-26 |
| 11232983 |
Copper interconnect structure with manganese barrier layer |
Daniel C. Edelstein, Son V. Nguyen, Takeshi Nogami, Deepika Priyadarshini |
2022-01-25 |
| 11177162 |
Trapezoidal interconnect at tight BEOL pitch |
Nicholas Anthony Lanzillo, Huai Huang, Junli Wang, Koichi Motoyama, Christopher J. Penny +1 more |
2021-11-16 |
| 11177169 |
Interconnects with gouged vias |
Kenneth Chun Kuen Cheng, Koichi Motoyama, Chih-Chao Yang |
2021-11-16 |
| 11177167 |
Ultrathin multilayer metal alloy liner for nano Cu interconnects |
Daniel C. Edelstein, Alfred Grill, Seth L. Knupp, Son V. Nguyen, Takeshi Nogami +2 more |
2021-11-16 |
| 11164815 |
Bottom barrier free interconnects without voids |
Kenneth Chun Kuen Cheng, Koichi Motoyama, Kisik Choi, Cornelius Brown Peethala, Joe Lee |
2021-11-02 |
| 11152299 |
Hybrid selective dielectric deposition for aligned via integration |
Nicholas Anthony Lanzillo, Christopher J. Penny, Lawrence A. Clevenger, Robert R. Robison |
2021-10-19 |
| 11152257 |
Barrier-less prefilled via formation |
Nicholas Anthony Lanzillo, Junli Wang, Lawrence A. Clevenger, Christopher J. Penny, Robert R. Robison +1 more |
2021-10-19 |
