KC

Kenneth Chun Kuen Cheng

IBM: 42 patents #2,200 of 70,183Top 4%
📍 Albany, NY: #34 of 790 inventorsTop 5%
🗺 New York: #2,367 of 115,490 inventorsTop 3%
Overall (All Time): #69,288 of 4,157,543Top 2%
43
Patents All Time

Issued Patents All Time

Showing 1–25 of 43 patents

Patent #TitleCo-InventorsDate
12406920 Top via interconnect with airgap Koichi Motoyama, Chanro Park, Chih-Chao Yang 2025-09-02
12400912 Dual-damascene fav interconnects with dielectric plug Chanro Park, Koichi Motoyama, Chih-Chao Yang 2025-08-26
12402329 Top via containing random-access memory cross-bar array Koichi Motoyama, Hsueh-Chung Chen, Chanro Park, Chih-Chao Yang 2025-08-26
12356638 Metal-insulator-metal capacitor structure with enlarged capacitor area Chanro Park, Koichi Motoyama, Chih-Chao Yang 2025-07-08
12341100 Copper interconnects with self-aligned hourglass-shaped metal cap Koichi Motoyama, Chanro Park, Chih-Chao Yang 2025-06-24
12315807 Reducing copper line resistance Chanro Park, Koichi Motoyama, Chih-Chao Yang 2025-05-27
12266607 Bottom barrier free interconnects without voids Koichi Motoyama, Kisik Choi, Cornelius Brown Peethala, Hosadurga Shobha, Joe Lee 2025-04-01
12087624 Beol tip-to-tip shorting and time dependent dielectric breakdown Chanro Park, Koichi Motoyama, Chih-Chao Yang 2024-09-10
12057395 Top via interconnects without barrier metal between via and above line Koichi Motoyama, Chanro Park, Chih-Chao Yang 2024-08-06
12040230 Encapsulated top via interconnects Oscar van der Straten, Joseph F. Maniscalco, Koichi Motoyama 2024-07-16
12027416 BEOL etch stop layer without capacitance penalty Chanro Park, Koichi Motoyama, Chih-Chao Yang 2024-07-02
11972977 Fabrication of rigid close-pitch interconnects Chanro Park, Koichi Motoyama, Kisik Choi 2024-04-30
11881431 Anti-fuse with laterally extended liner Chanro Park, Koichi Motoyama, Chih-Chao Yang 2024-01-23
11848264 Semiconductor structure with stacked vias having dome-shaped tips Koichi Motoyama, Chanro Park, Alexander Reznicek 2023-12-19
11758819 Magneto-resistive random access memory with laterally-recessed free layer Oscar van der Straten, Koichi Motoyama, Joseph F. Maniscalco, Chih-Chao Yang 2023-09-12
11735475 Removal of barrier and liner layers from a bottom of a via Chanro Park, Koichi Motoyama, Nicholas Anthony Lanzillo 2023-08-22
11430690 Interconnects having air gap spacers Koichi Motoyama, Oscar van der Straten, Joseph F. Maniscalco, Chih-Chao Yang 2022-08-30
11410879 Subtractive back-end-of-line vias Chanro Park, Koichi Motoyama, Chih-Chao Yang 2022-08-09
11380641 Pillar bump with noble metal seed layer for advanced heterogeneous integration Joseph F. Maniscalco, Koichi Motoyama, Oscar van der Straten, Alexander Reznicek 2022-07-05
11315872 Self-aligned top via Chanro Park, Koichi Motoyama, Kisik Choi, Chih-Chao Yang 2022-04-26
11289375 Fully aligned interconnects with selective area deposition Chanro Park, Koichi Motoyama, Chih-Chao Yang 2022-03-29
11282768 Fully-aligned top-via structures with top-via trim Koichi Motoyama, Brent A. Anderson, Joseph F. Maniscalco 2022-03-22
11270913 BEOL metallization formation Chanro Park, Koichi Motoyama, Brent A. Anderson, Somnath Ghosh 2022-03-08
11244854 Dual damascene fully aligned via in interconnects Koichi Motoyama, Chanro Park, Chih-Chao Yang 2022-02-08
11244853 Fully aligned via interconnects with partially removed etch stop layer Koichi Motoyama, Chanro Park, Chih-Chao Yang 2022-02-08