JW

Junli Wang

IBM: 418 patents #38 of 70,183Top 1%
Globalfoundries: 20 patents #152 of 4,424Top 4%
SS Stmicroelectronics Sa: 13 patents #86 of 1,676Top 6%
TE Tessera: 4 patents #104 of 271Top 40%
SO Sony: 4 patents #8,966 of 25,231Top 40%
AS Adeia Semiconductor Solutions: 2 patents #9 of 57Top 20%
EU East China Normal University: 1 patents #33 of 168Top 20%
Overall (All Time): #509 of 4,157,543Top 1%
437
Patents All Time

Issued Patents All Time

Showing 25 most recent of 437 patents

Patent #TitleCo-InventorsDate
12433020 Multi-VT solution for replacement metal gate bonded stacked FET Ruqiang Bao, Dechao Guo, Heng Wu 2025-09-30
12424591 Method and structure of forming independent contact for staggered CFET Ruilong Xie, Albert M. Chu, Albert M. Young, Brent A. Anderson, Ravikumar Ramachandran 2025-09-23
12412830 Semiconductor device with power via Ruilong Xie, Kisik Choi, Julien Frougier, Reinaldo Vega, Lawrence A. Clevenger +2 more 2025-09-09
12402408 Stacked FETS including devices with thick gate oxide Ruilong Xie, Julien Frougier, Nicolas Loubet, Ruqiang Bao, Min Gyu Sung +2 more 2025-08-26
12396227 Full wrap around backside contact Ruilong Xie, Kisik Choi, Julien Frougier, Min Gyu Sung 2025-08-19
12389582 High density stacked vertical transistor static random access memory structure Brent A. Anderson, Albert M. Chu, Hemanth Jagannathan 2025-08-12
12376369 FinFET devices Veeraraghavan S. Basker, Kangguo Cheng, Theodorus E. Standaert 2025-07-29
12369367 Bulk nanosheet with dielectric isolation Kangguo Cheng, Bruce B. Doris 2025-07-22
12363990 Upper and lower gate configurations of monolithic stacked FinFET transistors Chen Zhang, Ruilong Xie, Dechao Guo, Sung-Dae Suk 2025-07-15
12349445 Vertically integrated semiconductor device Heng Wu, Teresa J. Wu, Tenko Yamashita 2025-07-01
12349458 Staggered stacked circuits with increased effective width Brent A. Anderson, Albert M. Chu 2025-07-01
12342578 Stacked layer memory suitable for SRAM and having a long cell Brent A. Anderson, Albert M. Chu, Ruilong Xie, Carl Radens 2025-06-24
12336294 Gate-cut and separation techniques for enabling independent gate control of stacked transistors Ruilong Xie, Nicolas Loubet, Julien Frougier, Lawrence A. Clevenger, Prasad Bhosale +2 more 2025-06-17
12328859 Stacked FET SRAM Ruilong Xie, Carl Radens, Albert M. Chu, Brent A. Anderson, Julien Frougier +1 more 2025-06-10
12322652 Local interconnect for cross coupling Heng Wu, Ruilong Xie, Albert M. Chu, Albert M. Young, Brent A. Anderson 2025-06-03
12317537 Reduced parasitic capacitance semiconductor device containing at least one local interconnect passthrough structure Ruilong Xie, Dechao Guo, Alexander Reznicek 2025-05-27
12310072 Middle of line structure with stacked devices Su Chen Fan, Ruqiang Bao, Albert M. Young 2025-05-20
12278184 Vertically-stacked field effect transistor cell Albert M. Chu, Albert M. Young, Dechao Guo 2025-04-15
12278237 Stacked FETS with non-shared work function metals Ruilong Xie, Julien Frougier, Dechao Guo, Ruqiang Bao, Rishikesh Krishnan +1 more 2025-04-15
12272648 Semiconductor device having a backside power rail Ruilong Xie, Julien Frougier, Dechao Guo, Lawrence A. Clevenger 2025-04-08
12268026 High aspect ratio contact structure with multiple metal stacks Brent A. Anderson, Terence B. Hook, Indira Seshadri, Albert M. Young, Stuart A. Sieg +2 more 2025-04-01
12268016 Buried power rail formation for vertical field effect transistors Ruilong Xie, Brent A. Anderson, Chen Zhang, Heng Wu, Alexander Reznicek 2025-04-01
12176348 Self-aligned hybrid substrate stacked gate-all-around transistors Ruqiang Bao, Dechao Guo 2024-12-24
12148833 Three-dimensional, monolithically stacked field effect transistors formed on the front and backside of a wafer Sung-Dae Suk, Somnath Ghosh, Chen Zhang, Devendra K. Sadana, Dechao Guo 2024-11-19
12142599 Stacked transistor structure with reflection layer Teresa J. Wu, Tenko Yamashita, Heng Wu 2024-11-12