Issued Patents All Time
Showing 25 most recent of 384 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12412833 | TopVia interconnect with enlarged via top | Lawrence A. Clevenger, Brent A. Anderson, Nicholas Anthony Lanzillo | 2025-09-09 |
| 12396247 | Work function metal patterning for nanosheet CFETs | Ruilong Xie, Kangguo Cheng, Juntao Li | 2025-08-19 |
| 12394908 | Antenna assembly and electronic apparatus | Xiaofeng Li, Xing Wang, Rui Guan, Zheng Mo | 2025-08-19 |
| 12382682 | Gate-all-around nanosheet-FET with variable channel geometries for performance optimization | Julien Frougier, Ruilong Xie, Heng Wu, Alexander Reznicek | 2025-08-05 |
| 12364004 | Dummy fin contact in vertically stacked transistors | Joshua M. Rubin, Tenko Yamashita, Brent A. Anderson | 2025-07-15 |
| 12363990 | Upper and lower gate configurations of monolithic stacked FinFET transistors | Junli Wang, Ruilong Xie, Dechao Guo, Sung-Dae Suk | 2025-07-15 |
| 12349406 | Hybrid gate cut for stacked transistors | Ruilong Xie, Jingyun Zhang, Carl Radens | 2025-07-01 |
| 12335715 | Processing object-based audio signals | Alan J. Seefeldt, Lie Lu | 2025-06-17 |
| D1077589 | Noodle rack | — | 2025-06-03 |
| 12274089 | Stacked FET sidewall strap connections between gates | Julien Frougier, Ruilong Xie, Heng Wu | 2025-04-08 |
| 12267559 | Live streaming method and device | Yingyue Zhou, Ke Zhong, Kun-Chang Chang, Qian Xue, Yineng Lu | 2025-04-01 |
| 12268016 | Buried power rail formation for vertical field effect transistors | Ruilong Xie, Junli Wang, Brent A. Anderson, Heng Wu, Alexander Reznicek | 2025-04-01 |
| 12233983 | Ratchet-driven self-propelled scooter | Jimin Zhang | 2025-02-25 |
| 12182983 | Utilize machine learning in selecting high quality averaged SEM images from raw images automatically | Qiang Zhang, Jen-Shiang Wang, Jiao LIANG | 2024-12-31 |
| 12176416 | Stacked nanosheet transistor with defect free channel | Lan Yu, Kangguo Cheng, Heng Wu | 2024-12-24 |
| 12166658 | Binding segment identifier processing method and device | Ka Zhang, Zhibo Hu, Sheng Fang, Zuliang Wang | 2024-12-10 |
| 12154985 | Moon-shaped bottom spacer for vertical transport field effect transistor (VTFET) devices | Ruilong Xie, Julien Frougier, Alexander Reznicek, Shogo Mochizuki | 2024-11-26 |
| 12148833 | Three-dimensional, monolithically stacked field effect transistors formed on the front and backside of a wafer | Sung-Dae Suk, Somnath Ghosh, Junli Wang, Devendra K. Sadana, Dechao Guo | 2024-11-19 |
| 12142526 | Stacked device with buried interconnect | Ruilong Xie, Heng Wu, Julien Frougier, Alexander Reznicek | 2024-11-12 |
| 12087770 | Complementary field effect transistor devices | Ruilong Xie, Julien Frougier, Heng Wu, Kangguo Cheng | 2024-09-10 |
| 12002874 | Buried power rail contact | Junli Wang, Ruilong Xie, Brent A. Anderson, Heng Wu | 2024-06-04 |
| 12002856 | Vertical field effect transistor with crosslink fin arrangement | Indira Seshadri, Ruilong Xie, Ekmini Anuja De Silva | 2024-06-04 |
| 12002805 | Local vertical interconnects for monolithic stack transistors | Heng Wu, Ruilong Xie, Eric R. Miller | 2024-06-04 |
| 11978796 | Contact and isolation in monolithically stacked VTFET | Ruilong Xie, Lan Yu, Kangguo Cheng | 2024-05-07 |
| 11967599 | Array substrate and display panel | Jinfang Zhang, Zhiwei Chen, Lu Zhang, Siming Hu, Zhenzhen Han | 2024-04-23 |