Issued Patents All Time
Showing 1–25 of 88 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12364004 | Dummy fin contact in vertically stacked transistors | Chen Zhang, Tenko Yamashita, Brent A. Anderson | 2025-07-15 |
| 12300577 | Heterogeneous integrated multi-chip cooler module | Timothy J. Chainer, Todd E. Takken, Arvind Kumar | 2025-05-13 |
| 12262514 | Heat sinks with beyond-board fins | Shurong Tian, Todd E. Takken | 2025-03-25 |
| 12167612 | Back-side memory element with local memory select transistor | Arvind Kumar | 2024-12-10 |
| 12119335 | Interconnection structures for high bandwidth data transfer | Steven L. Wright, Arvind Kumar, Mounir Meghelli | 2024-10-15 |
| 11855191 | Vertical FET with contact to gate above active fin | Brent A. Anderson, Junli Wang, Indira Seshadri, Chen Zhang, Ruilong Xie +1 more | 2023-12-26 |
| 11756957 | Reducing gate resistance in stacked vertical transport field effect transistors | Heng Wu, Chen Zhang, Kangguo Cheng, Tenko Yamashita | 2023-09-12 |
| 11710669 | Precision thin electronics handling integration | John U. Knickerbocker, Bing Dang, Qianwen Chen, Arvind Kumar | 2023-07-25 |
| 11587896 | Transferrable pillar structure for fanout package or interconnect bridge | Yang Liu, Steven L. Wright, Paul S. Andry | 2023-02-21 |
| 11574875 | Multi-chip package structures having embedded chip interconnect bridges and fan-out redistribution layers | Steven L. Wright, Lawrence A. Clevenger | 2023-02-07 |
| 11563003 | Fin top hard mask formation after wafer flipping process | Chen Zhang, Tenko Yamashita, Brent A. Anderson | 2023-01-24 |
| 11276576 | Gate metal patterning to avoid gate stack attack due to excessive wet etching | Junli Wang, Alexander Reznicek, Shogo Mochizuki | 2022-03-15 |
| 11177217 | Direct bonded heterogeneous integration packaging structures | Kamal K. Sikka, Jon A. Casey, Arvind Kumar, Dinesh Gupta, Charles L. Arvin +5 more | 2021-11-16 |
| 11164791 | Contact formation for stacked vertical transport field-effect transistors | Heng Wu, Tenko Yamashita, Chen Zhang | 2021-11-02 |
| 11164817 | Multi-chip package structures with discrete redistribution layers | Kamal K. Sikka, Steven L. Wright, Lawrence A. Clevenger | 2021-11-02 |
| 11133259 | Multi-chip package structure having high density chip interconnect bridge with embedded power distribution network | Arvind Kumar, Lawrence A. Clevenger, Steven L. Wright, Wiren D. Becker, Xiao Hu Liu | 2021-09-28 |
| 11114410 | Multi-chip package structures formed by joining chips to pre-positioned chip interconnect bridge devices | Steven L. Wright, Lawrence A. Clevenger | 2021-09-07 |
| 11101318 | Back-side memory element with local memory select transistor | Arvind Kumar | 2021-08-24 |
| 11094637 | Multi-chip package structures having embedded chip interconnect bridges and fan-out redistribution layers | Steven L. Wright, Lawrence A. Clevenger | 2021-08-17 |
| 11088310 | Through-silicon-via fabrication in planar quantum devices | Jared Barney Hertzberg, Sami Rosenblatt, Vivekananda P. Adiga, Markus Brink, Arvind Kumar | 2021-08-10 |
| 11081542 | Buried MIM capacitor structure with landing pads | Alexander Reznicek, Praneet Adusumilli, Oscar van der Straten | 2021-08-03 |
| 11081424 | Micro-fluidic channels having various critical dimensions | Ravi K. Bonam, Kamal K. Sikka, Iqbal Rashid Saraf, Fee Li Lie | 2021-08-03 |
| 11069679 | Reducing gate resistance in stacked vertical transport field effect transistors | Heng Wu, Chen Zhang, Kangguo Cheng, Tenko Yamashita | 2021-07-20 |
| 11049844 | Semiconductor wafer having trenches with varied dimensions for multi-chip modules | Ravi K. Bonam, Mukta G. Farooq, Dinesh Gupta, James J. Kelly, Kamal K. Sikka | 2021-06-29 |
| 10991635 | Multiple chip bridge connector | Dale Curtis McHerron, Kamal K. Sikka, Ravi K. Bonam, Ramachandra Divakaruni, William J. Starke +1 more | 2021-04-27 |