WB

Wiren D. Becker

IBM: 46 patents #1,923 of 70,183Top 3%
Overall (All Time): #61,918 of 4,157,543Top 2%
46
Patents All Time

Issued Patents All Time

Showing 25 most recent of 46 patents

Patent #TitleCo-InventorsDate
12266598 Dense via pitch interconnect to increase wiring density Francesco Preda, Sungjun Chun, Jose A. Hejase, Junyan Tang, Pavel Roy Paladhi +2 more 2025-04-01
11658378 Vertically transitioning between substrate integrated waveguides (SIWs) within a multilayered printed circuit board (PCB) Joshua C. Myers, Jose A. Hejase, Junyan Tang, Pavel Roy Paladhi, Sungjun Chun +1 more 2023-05-23
11399428 PCB with substrate integrated waveguides using multi-band monopole antenna feeds for high speed communication Pavel Roy Paladhi, Jose A. Hejase, Junyan Tang, Joshua C. Myers, Sungjun Chun +1 more 2022-07-26
11133259 Multi-chip package structure having high density chip interconnect bridge with embedded power distribution network Joshua M. Rubin, Arvind Kumar, Lawrence A. Clevenger, Steven L. Wright, Xiao Hu Liu 2021-09-28
10257599 Slack and strain control mechanism Marc H. Coq, Milnes P. David, Ryan Elsasser, Syed F. Hossain 2019-04-09
10247489 Structural dynamic heat sink Bjorn J. Ahbel, Marc H. Coq, Milnes P. David, Ryan Elsasser, Syed F. Hossain 2019-04-02
10135162 Method for fabricating a hybrid land grid array connector Jose A. Hejase, Daniel M. Dreps, Sungjun Chun, Brian S. Beaman 2018-11-20
10128593 Connector having a body with a conductive layer common to top and bottom surfaces of the body as well as to wall surfaces of a plurality of holes in the body Jose A. Hejase, Daniel M. Dreps, Sungjun Chun, Brian S. Beaman 2018-11-13
9733305 Frequency-domain high-speed bus signal integrity compliance model Daniel M. Dreps, Jose A. Hejase, Glen A. Wiedemeier, Si T. Win 2017-08-15
9686053 Frequency-domain high-speed bus signal integrity compliance model Daniel M. Dreps, Jose A. Hejase, Glen A. Wiedemeier, Si T. Win 2017-06-20
9673941 Frequency-domain high-speed bus signal integrity compliance model Daniel M. Dreps, Jose A. Hejase, Glen A. Wiedemeier, Si T. Win 2017-06-06
9644907 Structurally dynamic heat sink Bjorn J. Ahbel, Marc H. Coq, Milnes P. David, Ryan Elsasser, Syed F. Hossain 2017-05-09
9638750 Frequency-domain high-speed bus signal integrity compliance model Daniel M. Dreps, Jose A. Hejase, Glen A. Wiedemeier, Si T. Win 2017-05-02
9625220 Structurally dynamic heat sink Bjorn J. Ahbel, Marc H. Coq, Milnes P. David, Ryan Elsasser, Syed F. Hossain 2017-04-18
9627787 DIMM connector region vias and routing William L. Brodsky, Matteo Cocchini, Michael A. Cracraft 2017-04-18
9548551 DIMM connector region vias and routing William L. Brodsky, Matteo Cocchini, Michael A. Cracraft 2017-01-17
9444162 DIMM connector region vias and routing William L. Brodsky, Matteo Cocchini, Michael A. Cracraft 2016-09-13
9052880 Multi-level interconnect apparatus Alan F. Becker, William L. Brodsky, John G. Torok 2015-06-09
8683413 Method for making high-speed ceramic modules with hybrid referencing scheme for improved performance and reduced cost Jinwoo Choi, Tingdong Zhou 2014-03-25
8339803 High-speed ceramic modules with hybrid referencing scheme for improved performance and reduced cost Jinwoo Choi, Tingdong Zhou 2012-12-25
8295419 Method and apparatus for generating synchronization signals for synchronizing multiple chips in a system Charlie C. Hwang, Timothy G. McNamara, Ching-Lung Tong 2012-10-23
8261226 Network flow based module bottom surface metal pin assignment Ruchir Puri, Haoxing Ren, Hua Xiang, Tingdong Zhou 2012-09-04
8050174 Self-healing chip-to-chip interface Daniel M. Dreps, Frank D. Ferraiolo, Anand Haridass, Robert J. Reese 2011-11-01
8018837 Self-healing chip-to-chip interface Daniel M. Dreps, Frank D. Ferraiolo, Anand Haridass, Robert J. Reese 2011-09-13
7987587 Method of forming solid vias in a printed circuit board Michael F. McAllister, Alan Daniel Stigliani, John G. Torok 2011-08-02