Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8295419 | Method and apparatus for generating synchronization signals for synchronizing multiple chips in a system | Wiren D. Becker, Timothy G. McNamara, Ching-Lung Tong | 2012-10-23 |
| 8291157 | Concurrent refresh in cache memory | Timothy C. Bronson, Hieu T. Huynh, Kenneth D. Klapproth | 2012-10-16 |
| 8258758 | System to improve a multistage charge pump and associated methods | Paul D. Muench, Donald W. Plass, Michael A. Sperling | 2012-09-04 |
| 8006213 | Optimization method of integrated circuit design for reduction of global clock load and balancing clock skew | Christopher J. Berry, Jose L. Neves, David W. Lewis | 2011-08-23 |
| 7941689 | Minimizing clock uncertainty on clock distribution networks using a multi-level de-skewing technique | Jose Neves, Phillip J. Restle | 2011-05-10 |
| 7831946 | Clock distribution network wiring structure | Rick L. Dennis, Jose L. Neves | 2010-11-09 |
| 7826579 | Method and apparatus for generating synchronization signals for synchronizing multiple chips in a system | Wiren D. Becker, Timothy G. McNamara, Ching-Lung Tong | 2010-11-02 |
| 7659740 | System and method of digitally testing an analog driver circuit | Joseph O. Marsh, Jeremy K. Stephens, James S. Mason, Huihao Xu, Matthew B. Baecher +2 more | 2010-02-09 |
| 7466156 | System of digitally testing an analog driver circuit | Joseph O. Marsh, Jeremy K. Stephens, James S. Mason, Huihao Xu, Matthew B. Baecher +2 more | 2008-12-16 |
| 7456671 | Hierarchical scalable high resolution digital programmable delay circuit | Phillip J. Restle, Leon Sigal | 2008-11-25 |
| 7382844 | Methods to self-synchronize clocks on multiple chips in a system | Timothy G. McNamara, Ching-Lung Tong, Wiren D. Becker | 2008-06-03 |
| 7368958 | Methods and systems for locally generating non-integral divided clocks with centralized state machines | William V. Huott, Timothy G. McNamara | 2008-05-06 |
| 7355460 | Method for locally generating non-integral divided clocks with centralized state machines | William V. Huott, Timothy G. McNamara | 2008-04-08 |
| 7319348 | Circuits for locally generating non-integral divided clocks with centralized state machines | William V. Huott, Timothy C. McNamara | 2008-01-15 |
| 7086020 | Circuits and methods for matching device characteristics for analog and mixed-signal designs | Howard H. Chen, Louis L. Hsu | 2006-08-01 |