Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8954914 | Graphical method and product to assign physical attributes to entities in a high level descriptive language used for VLSI chip design | John T. Badar, Michael H. Wood, Matthew M. Ziegler | 2015-02-10 |
| 8276105 | Automatic positioning of gate array circuits in an integrated circuit design | Joachim Keinert, Douglass T. Lamb, Shyam Ramji | 2012-09-25 |
| 8006213 | Optimization method of integrated circuit design for reduction of global clock load and balancing clock skew | Christopher J. Berry, Jose L. Neves, Charlie C. Hwang | 2011-08-23 |