Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7733964 | Automatic adaptive equalization method for high-speed serial transmission link | Louis L. Hsu, Karl D. Selander, Michael A. Sorna, Huihao Xu | 2010-06-08 |
| 7659740 | System and method of digitally testing an analog driver circuit | Joseph O. Marsh, Charlie C. Hwang, James S. Mason, Huihao Xu, Matthew B. Baecher +2 more | 2010-02-09 |
| 7466156 | System of digitally testing an analog driver circuit | Joseph O. Marsh, Charlie C. Hwang, James S. Mason, Huihao Xu, Matthew B. Baecher +2 more | 2008-12-16 |
| 7352815 | Data transceiver and method for equalizing the data eye of a differential input data signal | Hibourahima Camara, Joseph Natonio, Karl D. Selander, Michael A. Sorna, Daniel W. Storaska | 2008-04-01 |
| 7295618 | Automatic adaptive equalization method and system for high-speed serial transmission link | Louis L. Hsu, Karl D. Selander, Michael A. Sorna, Huihao Xu | 2007-11-13 |
| 6890815 | Reduced cap layer erosion for borderless contacts | Johnathan E. Faltermeier, David M. Dobuzinsky, Larry Clevenger, Munir D. Naeem, Chienfan Yu +3 more | 2005-05-10 |
| 6778447 | Embedded DRAM system having wide data bandwidth and data transfer data protocol | Louis L. Hsu, Rajiv V. Joshi, Daniel W. Storaska | 2004-08-17 |
| 6775736 | Embedded DRAM system having wide data bandwidth and data transfer data protocol | Louis L. Hsu, Rajiv J. Joshi, Daniel W. Storaska | 2004-08-10 |
| 6711078 | Writeback and refresh circuitry for direct sensed DRAM macro | Ciaran J. Brennan, John A. Fifield, Daniel W. Storaska | 2004-03-23 |
| 6696759 | Semiconductor device with diamond-like carbon layer as a polish-stop layer | Lawrence A. Clevenger, Louis L. Hsu, Michael Wise | 2004-02-24 |
| 6614714 | Semiconductor memory system having a data clock system for reliable high-speed data transfers | Louis L. Hsu, Daniel W. Storaska, Li-Kong Wang | 2003-09-02 |
| 6552944 | Single bitline direct sensing architecture for high speed memory device | John A. Fifield, Toshiaki Kirihata, Wing K. Luk, Daniel W. Storaska | 2003-04-22 |
| 6449202 | DRAM direct sensing scheme | Hiroyuki Akatsu, Louis L. Hsu, Daniel W. Storaska | 2002-09-10 |
| 6420216 | Fuse processing using dielectric planarization pillars | Larry Clevenger, Louis L. Hsu, Chandrasekhar Narayan, Michael Wise | 2002-07-16 |
| 6379222 | Methods and apparatus for chemical mechanical planarization (CMP) of a semiconductor wafer | Michael Wise, Suri Hedge | 2002-04-30 |
| 6348395 | Diamond as a polish-stop layer for chemical-mechanical planarization in a damascene process flow | Lawrence A. Clevenger, Louis L. Hsu, Michael Wise | 2002-02-19 |
| 6261914 | Process for improving local uniformity of chemical mechanical polishing using a self-aligned polish rate enhancement layer | Ramachandra Divakaruni, Jeffrey P. Gambino, Carl Radens | 2001-07-17 |
| 6232222 | Method of eliminating a critical mask using a blockout mask and a resulting semiconductor structure | Michael D. Armacost, Richard A. Conti, Jeffrey P. Gambino | 2001-05-15 |
| 6129610 | Polish pressure modulation in CMP to preferentially polish raised features | — | 2000-10-10 |
| 6102776 | Apparatus and method for controlling polishing of integrated circuit substrates | Karl E. Boggs, Kenneth M. Davis, William Francis Landers, Robert M. Merkling, Jr., Michael L. Passow | 2000-08-15 |
| 6020262 | Methods and apparatus for chemical mechanical planarization (CMP) of a semiconductor wafer | Michael Wise, Suri Hedge | 2000-02-01 |
| 5972787 | CMP process using indicator areas to determine endpoint | Karl E. Boggs, Chenting Lin, Joachim Nuetzel, Robert Ploessl, Maria Ronay +1 more | 1999-10-26 |
| 5915183 | Raised source/drain using recess etch of polysilicon | Jeffrey P. Gambino, Scott D. Halle, Jack A. Mandelman | 1999-06-22 |