Issued Patents All Time
Showing 25 most recent of 55 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8772850 | Embedded DRAM memory cell with additional patterning layer for improved strap formation | Kangguo Cheng, Byeong Y. Kim, Munir D. Naeem | 2014-07-08 |
| 8426268 | Embedded DRAM memory cell with additional patterning layer for improved strap formation | Kangguo Cheng, Byeong Y. Kim, Munir D. Naeem | 2013-04-23 |
| 8008713 | Vertical SOI trench SONOS cell | Herbert L. Ho, Jack A. Mandelman, Yoichi Otani | 2011-08-30 |
| 8003488 | Shallow trench isolation structure compatible with SOI embedded DRAM | Kangguo Cheng, Munir D. Naeem, Byeong Y. Kim | 2011-08-23 |
| 7893485 | Vertical SOI trench SONOS cell | Herbert L. Ho, Jack A. Mandelman, Yoichi Otani | 2011-02-22 |
| 7871893 | Method for non-selective shallow trench isolation reactive ion etch for patterning hybrid-oriented devices compatible with high-performance highly-integrated logic devices | Gregory Costrini, Thomas S. Kanarsky, Munir D. Naeem, Christopher D. Sheraw, Richard S. Wise | 2011-01-18 |
| 7592245 | Poly filled substrate contact on SOI structure | Byeong Y. Kim, Effendi Leobandung, Munir D. Naeem, Brian L. Tessier | 2009-09-22 |
| 7560360 | Methods for enhancing trench capacitance and trench capacitor | Kangguo Cheng, Xi Li | 2009-07-14 |
| 7514323 | Vertical SOI trench SONOS cell | Herbert L. Ho, Jack A. Mandelman, Yoichi Otani | 2009-04-07 |
| 7394131 | STI formation in semiconductor device including SOI and bulk silicon regions | Michael D. Steigerwalt, Mahender Kumar, Herbert L. Ho, Johnathan E. Faltermeier, Denise Pendleton | 2008-07-01 |
| 7358172 | Poly filled substrate contact on SOI structure | Byeong Y. Kim, Effendi Leobandung, Munir D. Naeem, Brian L. Tessier | 2008-04-15 |
| 7118986 | STI formation in semiconductor device including SOI and bulk silicon regions | Michael D. Steigerwalt, Mahender Kumar, Herbert L. Ho, Johnathan E. Faltermeier, Denise Pendleton | 2006-10-10 |
| 7087532 | Formation of controlled sublithographic structures | Jochen Beintner, Siddhartha Panda | 2006-08-08 |
| 6964897 | SOI trench capacitor cell incorporating a low-leakage floating body array transistor | Karen Bard, Herbert L. Ho, Mahendar Kumar, Denise Pendleton, Michael D. Steigerwalt +1 more | 2005-11-15 |
| 6960523 | Method of reducing erosion of a nitride gate cap layer during reactive ion etch of nitride liner layer for bit line contact of DRAM device | Michael Maldei, Prakash Dev, Johnathan E. Faltermeier, Thomas Rupp, Chienfan Yu +3 more | 2005-11-01 |
| 6890815 | Reduced cap layer erosion for borderless contacts | Johnathan E. Faltermeier, Jeremy K. Stephens, Larry Clevenger, Munir D. Naeem, Chienfan Yu +3 more | 2005-05-10 |
| 6887785 | Etching openings of different depths using a single mask layer method and structure | Carl Radens, Roy Iggulden, Jay William Strane, Keith Kwong Hon Wong | 2005-05-03 |
| 6869542 | Hard mask integrated etch process for patterning of silicon oxide and other dielectric materials | Sadanand V. Desphande, Arpan Mahorowala, Tina Wagner, Richard S. Wise | 2005-03-22 |
| 6809027 | Self-aligned borderless contacts | Jay William Strane, Hiroyuki Akatsu | 2004-10-26 |
| 6806200 | Method of improving etch uniformity in deep silicon etching | Siddhartha Panda, Rolf Weis, Richard S. Wise | 2004-10-19 |
| 6806177 | Method of making self-aligned borderless contacts | Jay William Strane, Hiroyuki Akatsu | 2004-10-19 |
| 6740539 | Carbon-graded layer for improved adhesion of low-k dielectrics to silicon substrates | Richard A. Conti, Prakash Dev, Daniel C. Edelstein, Gill Yong Lee, Kia-Seng Low +3 more | 2004-05-25 |
| 6740568 | Method to enhance epitaxial regrowth in amorphous silicon contacts | Yun-Yu Wang, Johnathan E. Faltermeier, Colleen Snavely, Michael Maldei, Michael Iwatake +4 more | 2004-05-25 |
| 6656375 | Selective nitride: oxide anisotropic etch process | Michael D. Armacost, John C. Malinowski, Hung Y. Ng, Richard S. Wise, Chienfan Yu | 2003-12-02 |
| 6570256 | Carbon-graded layer for improved adhesion of low-k dielectrics to silicon substrates | Richard A. Conti, Prakash Dev, Daniel C. Edelstein, Gill Yong Lee, Kia-Seng Low +3 more | 2003-05-27 |