Thomas Rupp — 18 Patents at IBM

Thomas Rupp has been granted 18 US patents while listed as an inventor at IBM. The first was granted in 2000 and the most recent in December 2024. Thomas Rupp ranks #245,716 of 4,157,543 US inventors in our database (top 5.9%). Patent records list Thomas Rupp in Stormville, NY, US.

Issued Patents All Time

Showing 1–18 of 18 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12183696	Semiconductor device including bonding pad metal layer structure	Evelyn Napetschnig, Jens Brandenburg, Christoffer Erbert, Joachim Hirschler, Oliver Humbel +2 more	2024-12-31
11764176	Semiconductor device including bonding pad metal layer structure	Evelyn Napetschnig, Jens Brandenburg, Christoffer Erbert, Joachim Hirschler, Oliver Humbel +2 more	2023-09-19
11329126	Method of manufacturing a superjunction semiconductor device	Armin Tilke, Hans Weber, Christian Fachmann, Roman Knoefler, Gabor Mezoesi +3 more	2022-05-10
6960523	Method of reducing erosion of a nitride gate cap layer during reactive ion etch of nitride liner layer for bit line contact of DRAM device	Michael Maldei, Prakash Dev, David M. Dobuzinsky, Johnathan E. Faltermeier, Chienfan Yu +3 more	2005-11-01
6699750	Vertical device formed adjacent to a wordline sidewall and method for semiconductor chips	—	2004-03-02	$143,000
6486505	Semiconductor contact and method of forming the same	Jeffrey P. Gambino, Peter D. Hoh, Senthil Srinivasan	2002-11-26	$87,000
6444531	Disposable spacer technology for device tailoring	Scott D. Halle	2002-09-03
6291335	Locally folded split level bitline wiring	Rainer Florian Schnabel, Ulrike Gruening, Gerhard Mueller	2001-09-18	$253,000
6274440	Manufacturing of cavity fuses on gate conductor level	Kenneth C. Arndt, Axel Brintzinger, Richard A. Conti, Donna R. Cote, Chandrasekhar Narayan +2 more	2001-08-14	$21,171,000
6268293	Method of forming wires on an integrated circuit chip	Lawrence A. Clevenger, Greg Costrini, Dave Dobuzinsky, Yoichi Otani, Viraj Y. Sardesai	2001-07-31
6258659	Embedded vertical DRAM cells and dual workfunction logic gates	Ulrike Gruening, Ramachandra Divakaruni, Jack A. Mandelman	2001-07-10	$19,901,000
6255158	Process of manufacturing a vertical dynamic random access memory device	Toshiharu Furukawa, Ulrike Gruening, David V. Horak, Jack A. Mandelman, Carl Radens	2001-07-03	$26,086,000
6210995	Method for manufacturing fusible links in a semiconductor device	Axel Brintzinger, Jeffrey P. Gambino, Scott D. Halle	2001-04-03
6204187	Contact and deep trench patterning	Alan E. Thomas, Franz Zach	2001-03-20	$3,303,000
6172390	Semiconductor device with vertical transistor and buried word line	Johann Alsmeier	2001-01-09
6153902	Vertical DRAM cell with wordline self-aligned to storage trench	Toshiharu Furukawa, Ulrike Gruening, David V. Horak, Jack A. Mandelman, Carl Radens	2000-11-28	$55,341,000
6096664	Method of manufacturing semiconductor structures including a pair of MOSFETs	Stephan Kudelka, Jeffrey P. Gambino, Mary E. Weybright	2000-08-01	$27,147,000
6091094	Vertical device formed adjacent to a wordline sidewall and method for semiconductor chips	—	2000-07-18

Thomas Rupp — 18 Patents

Issued Patents All Time

Patent Widget