FZ

Franz Zach

IBM: 12 patents #9,222 of 70,183Top 15%
CS Cadence Design Systems: 6 patents #235 of 2,263Top 15%
IN Invarium: 5 patents #2 of 12Top 20%
KL Kla: 4 patents #87 of 758Top 15%
Infineon Technologies Ag: 3 patents #3,160 of 7,486Top 45%
KL Kla-Tencor: 1 patents #809 of 1,394Top 60%
Overall (All Time): #126,609 of 4,157,543Top 4%
29
Patents All Time

Issued Patents All Time

Showing 25 most recent of 29 patents

Patent #TitleCo-InventorsDate
12197137 System and method for determining post bonding overlay Mark D. Smith, Xiaomeng Shen, Jason Saito, David Owen 2025-01-14
12164277 System and method for mitigating overlay distortion patterns caused by a wafer bonding tool Mark D. Smith, Roel Gronheid 2024-12-10
11829077 System and method for determining post bonding overlay Mark D. Smith, Xiaomeng Shen, Jason Saito, David Owen 2023-11-28
11782411 System and method for mitigating overlay distortion patterns caused by a wafer bonding tool Mark D. Smith, Roel Gronheid 2023-10-10
10386829 Systems and methods for controlling an etch process 2019-08-20
8141008 Optical lithography correction process 2012-03-20
7923786 Selective silicon-on-insulator isolation structure and method An Steegen, Maheswaran Surendra, Hsing-Jen Wann, Ying Zhang, Robert C. Wong 2011-04-12
7882456 Optical lithography correction process 2011-02-01
7861209 Method for interlayer and yield based optical proximity correction 2010-12-28
7784019 Yield based retargeting for semiconductor design flow 2010-08-24
7712069 Method for interlayer and yield based optical proximity correction 2010-05-04
7600212 Method of compensating photomask data for the effects of etch and lithography processes Jesus Carrero, Bayram Yenikaya, Gokhan Percin, Xuelong Cao, Abdurrahman Sezginer 2009-10-06
7588868 Method and system for reducing the impact of across-wafer variations on critical dimension measurements Abdurrahman Sezginer, Gokhan Percin 2009-09-15
7536670 Method for verifying and choosing lithography model Gokhan Percin, Ram Ramanujam 2009-05-19
7444615 Calibration on wafer sweet spots Gokhan Percin, Ram Ramanujam, Abdurrahman Sezginer, Chi-Song Horng, Roy Prasad 2008-10-28
7392502 Method for real time monitoring and verifying optical proximity correction model and method Gokhan Percin, Ram Ramanujam, Koichi Suzuki 2008-06-24
7334212 Method for interlayer and yield based optical proximity correction 2008-02-19
7326983 Selective silicon-on-insulator isolation structure and method An Steegen, Maheswaran Surendra, Hsing-Jen Wann, Ying Zhang, Robert C. Wong 2008-02-05
7246343 Method for correcting position-dependent distortions in patterning of integrated circuits Devendra Joshi, Abdurrahman Sezginer 2007-07-17
7224437 Method for measuring and verifying stepper illumination Gokhan Percin, Abdurrahman Sezginer 2007-05-29
7189481 Characterizing flare of a projection lens Bo Wu, Abdurrahman Sezginer 2007-03-13
7124396 Alternating phase-shift mask rule compliant IC design 2006-10-17
6961920 Method for interlayer and yield based optical proximity correction 2005-11-01
6936522 Selective silicon-on-insulator isolation structure and method An Steegen, Maheswaran Surendra, Hsing-Jen Wann, Ying Zhang, Robert C. Wong 2005-08-30
6927172 Process to suppress lithography at a wafer edge Wolfgang Bergner, Linda A. Chen, Stephan Kudelka 2005-08-09