AB

Axel Brintzinger

Infineon Technologies Ag: 33 patents #231 of 7,486Top 4%
IBM: 17 patents #6,502 of 70,183Top 10%
SA Siemens Aktiengesellschaft: 3 patents #4,667 of 22,248Top 25%
IN Infineon: 1 patents #4 of 37Top 15%
📍 Fishkill, NY: #17 of 387 inventorsTop 5%
🗺 New York: #2,549 of 115,490 inventorsTop 3%
Overall (All Time): #76,989 of 4,157,543Top 2%
41
Patents All Time

Issued Patents All Time

Showing 1–25 of 41 patents

Patent #TitleCo-InventorsDate
7514798 Arrangement for the protection of three-dimensional structures on wafers 2009-04-07
7393782 Process for producing layer structures for signal distribution Octavio Trovarelli, Wolfgang Leiberg 2008-07-01
7390742 Method for producing a rewiring printed circuit board Stefan Ruckmich, Octavio Trovarelli, David Wallis, Ingo Uhlendorf 2008-06-24
7368375 Electronic component with compliant elevations having electrical contact areas and method for producing it Stefan Ruckmich, Octavio Trovarelli 2008-05-06
7335591 Method for forming three-dimensional structures on a substrate Ingo Uhlendorf 2008-02-26
7332430 Method for improving the mechanical properties of BOC module arrangements Octavio Trovarelli 2008-02-19
7271095 Process for producing metallic interconnects and contact surfaces on electronic components Octavio Trovarelli 2007-09-18
7235859 Arrangement and process for protecting fuses/anti-fuses Octavio Trovarelli, David Wallis, Wolfgang Leiberg 2007-06-26
7172966 Method for fabricating metallic interconnects on electronic components Octavio Trovarelli, Wolfgang Leiberg 2007-02-06
7169647 Connection between a semiconductor chip and an external conductor structure and method for producing it Octavio Trovarelli, Ingo Uhlendorf, David Wallis 2007-01-30
7115496 Method for protecting the redistribution layer on wafers/chips Octavio Trovarelli 2006-10-03
7087975 Area efficient stacking of antifuses in semiconductor device Gunther Lehmann, Gabriel Daniel 2006-08-08
6943101 Manufacturing of a corrosion protected interconnect on a substrate 2005-09-13
6919264 Method for the solder-stop structuring of elevations on wafers Ingo Uhlendorf, Andre Schenk, Alexander Wollanke 2005-07-19
6911390 Fabrication method for an interconnect on a substrate 2005-06-28
6888215 Dual damascene anti-fuse with via before wire Carl Radens 2005-05-03
6882027 Methods and apparatus for providing an antifuse function Carl Radens, William R. Tonti 2005-04-19
6866943 Bond pad structure comprising tungsten or tungsten compound layer on top of metallization level Gerald Friese, Werner Robl, Hans-Joachim Barth 2005-03-15
6720212 Method of eliminating back-end rerouting in ball grid array packaging Werner Robl, Thomas Goebel, Gerald Friese 2004-04-13
6638870 Forming a structure on a wafer Barbara Vasquez, Harry Hedler 2003-10-28
6566238 Metal wire fuse structure with cavity Edward W. Kiewra, Chandrasekhar Narayan, Carl Radens 2003-05-20
6509208 Method for forming structures on a wafer 2003-01-21
6495918 Chip crack stop design for semiconductor chips 2002-12-17
6495901 Multi-level fuse structure Chandrasekhar Narayan, David Lachtrupp, Kenneth C. Arndt 2002-12-17
6486526 Crack stop between neighboring fuses for protection from fuse blow damage Chandrasekhar Narayan, Edward W. Kiewra, Carl Radens 2002-11-26