Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8120182 | Integrated circuit comprising conductive lines and contact structures and method of manufacturing an integrated circuit | Andreas Thies, Sirko Kramp, Helmut Schneider | 2012-02-21 |
| 7355218 | Semiconductor component with a MOS transistor | Michael Sommer | 2008-04-08 |
| 6986088 | Method and apparatus for reducing the current consumption of an electronic circuit | Helmut Fischer, Johann Pfeiffer | 2006-01-10 |
| 6821187 | Method for chemical-mechanical polishing of a layer which is a substrate and is a metal selected from a platinum group | Gerhard Beitel, Annette Saenger, Gerd Mainka | 2004-11-23 |
| 6788087 | Integrated circuit having a test circuit, and method of decoupling a test circuit in an integrated circuit | — | 2004-09-07 |
| 6731131 | Circuit for an electronic semiconductor module | Johann Pfeiffer | 2004-05-04 |
| 6708405 | Method for producing an electrically conducting connection | Barbara Hasler, Guenther Schindler, Volker Weinrich | 2004-03-23 |
| 6448173 | Aluminum-based metallization exhibiting reduced electromigration and method therefor | Lawrence A. Clevenger, Ronald G. Filippi, Kenneth P. Rodbell, Roy Iggulden, Chao-Kun Hu +3 more | 2002-09-10 |
| 6361880 | CVD/PVD/CVD/PVD fill process | Larry Clevenger, Roy Iggulden, Stefan Weber | 2002-03-26 |
| 6344409 | Dummy patterns for aluminum chemical polishing (CMP) | Mark A. Jaso | 2002-02-05 |
| 6310735 | Releasable and stress-free securing assembly for optical elements | Stefan Uwe Best | 2001-10-30 |
| 6300235 | Method of forming multi-level coplanar metal/insulator films using dual damascene with sacrificial flowable oxide | Klaus Feldner, Virinder Grewal, Bernd Vollmer | 2001-10-09 |
| 6291335 | Locally folded split level bitline wiring | Ulrike Gruening, Thomas Rupp, Gerhard Mueller | 2001-09-18 |
| 6265308 | Slotted damascene lines for low resistive wiring lines for integrated circuit | Gary B. Bronner, Greg Costrini, Carl Radens | 2001-07-24 |
| 6165896 | Self-aligned formation and method for semiconductors | Jeffrey P. Gambino, Zhijian Lu | 2000-12-26 |
| 6166819 | System and methods for optically measuring dielectric thickness in semiconductor devices | — | 2000-12-26 |
| 6093631 | Dummy patterns for aluminum chemical polishing (CMP) | Mark A. Jaso | 2000-07-25 |
| 6037648 | Semiconductor structure including a conductive fuse and process for fabrication thereof | Kenneth C. Arndt, Jeffrey P. Gambino, Jack A. Mandelman, Chandrasekhar Narayan, Ronald J. Schutz +1 more | 2000-03-14 |
| 6033984 | Dual damascene with bond pads | Xian J. Ning, Bruno Spuler | 2000-03-07 |
| 5903343 | Method for detecting under-etched vias | Xian J. Ning | 1999-05-11 |