BS

Bruno Spuler

SA Siemens Aktiengesellschaft: 6 patents #2,149 of 22,248Top 10%
Infineon Technologies Ag: 5 patents #2,021 of 7,486Top 30%
IBM: 4 patents #21,733 of 70,183Top 35%
KT Kabushiki Kaisha Toshiba: 3 patents #8,011 of 21,451Top 40%
IK Infineon Technologies Sc 300 Gmbh & Co. Kg: 1 patents #15 of 35Top 45%
SC Siemens Components: 1 patents #6 of 30Top 20%
Overall (All Time): #388,180 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6984556 Method of forming an isolation layer and method of manufacturing a trench capacitor Christian Drabe, Jana Haensel, Anke Krasemann, Barbara Lorenz, Thomas Morgenstern +1 more 2006-01-10
6784553 Semiconductor device with self-aligned contact and method for manufacturing the device Ralf Zedlitz 2004-08-31
6593254 Method for clamping a semiconductor device in a manufacturing process Manfred Kraxenberger, Ines Thümmel, Thorsten Schedel, Karl Mautz 2003-07-15
6521542 Method for forming dual damascene structure Mike Armacost, Gabriela Brase, Alois Gutmann 2003-02-18
6379869 Method of improving the etch resistance of chemically amplified photoresists by introducing silicon after patterning Uwe Schroeder, Gerhard Kunkel, Alois Gutmann 2002-04-30
6177353 Metallization etching techniques for reducing post-etch corrosion of metal lines Martin Gutsche, Peter Strobl, Stephan Wege, Eike Lueken, Georg Stojakovic 2001-01-23
6071820 Method for patterning integrated circuit conductors Virinder Grewal 2000-06-06
6033984 Dual damascene with bond pads Rainer Florian Schnabel, Xian J. Ning 2000-03-07
5976986 Low pressure and low power C1.sub.2 /HC1 process for sub-micron metal etching Munir D. Naeem, Stuart M. Burns, Rosemary Christie, Virinder Grewal, Walter W. Kocon +2 more 1999-11-02
5935873 Deposition of carbon into nitride layer for improved selectivity of oxide to nitride etchrate for self aligned contact etching Juergen Wittmann, Martin Gutsche, Wolfgang Bergner, Matthias Ilg 1999-08-10
5874363 Polycide etching with HCL and chlorine Peter D. Hoh, Tokuhisa Ohiwa, Virinder Grewal, Waldemar Walter Kocon, Guadalupe Wiltshire 1999-02-23
5854126 Method for forming metallization in semiconductor devices with a self-planarizing material Dirk Tobben, Martin Gutsche, Peter Weigand 1998-12-29
5846884 Methods for metal etching with reduced sidewall build up during integrated circuit manufacturing Munir D. Naeem, Stuart M. Burns, Nancy Anne Greco, STEVE GRECO, Virinder Grewal +2 more 1998-12-08