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USPTO Patent Rankings Data through Dec 31, 2025
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Stuart M. Burns — 17 Patents

IBM: 17 patents #6,529 of 70,183Top 10%
Siemens Aktiengesellschaft: 2 patents #6,658 of 22,248Top 30%
Kabushiki Kaisha Toshiba: 2 patents #10,039 of 21,451Top 50%
Ridgefield, CT: #66 of 574 inventorsTop 15%
Connecticut: #2,507 of 34,797 inventorsTop 8%
Overall (All Time): #263,971 of 4,157,543Top 7%
17 Patents All Time
Stuart M. Burns has been granted 17 US patents while listed as an inventor at IBM. The first was granted in 1998 and the most recent in July 2003. Stuart M. Burns ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list Stuart M. Burns in Ridgefield, CT, US.

Patents per Year

Patents granted per year, 1998 to 2003Bar chart with a peak of 7 patents in 2000.peak 71998: 2 patents19981999: 4 patents19992000: 7 patents20002001: 2 patents20012002: 1 patents20022003: 1 patents2003

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
6593617 Field effect transistors with vertical gate side walls and method for making such transistors Diane C. Boyd, Hussein I. Hanafi, Yuan Taur, William C. Wille 2003-07-15 $18,764,000
6461529 Anisotropic nitride etch process with high selectivity to oxide and photoresist layers in a damascene etch scheme Diane C. Boyd, Hussein I. Hanafi, Waldemar Walter Kocon, William C. Wille, Richard S. Wise 2002-10-08 $10,352,000
6268226 Reactive ion etch loading measurement technique David Angell, Waldemar Walter Kocon, Michael L. Passow 2001-07-31 $29,242,000
6258679 Sacrificial silicon sidewall for damascene gate formation Hussein I. Hanafi 2001-07-10 $19,901,000
6143635 Field effect transistors with improved implants and method for making such transistors Diane C. Boyd, Hussein I. Hanafi, Yuan Taur, William C. Wille 2000-11-07 $39,779,000
6077745 Self-aligned diffused source vertical transistors with stack capacitors in a 4F-square memory cell array Hussein I. Hanafi, Jeffrey J. Welser, Waldemar Walter Kocon, Howard L. Kalter 2000-06-20 $29,799,000
6040214 Method for making field effect transistors having sub-lithographic gates with vertical side walls Diane C. Boyd, Hussein I. Hanafi, Yuan Taur, William C. Wille 2000-03-21 $35,798,000
6040210 2F-square memory cell for gigabit memory applications Hussein I. Hanafi 2000-03-21 $35,798,000
6033957 4F-square memory cell having vertical floating-gate transistors with self-aligned shallow trench isolation Hussein I. Hanafi, Jeffrey J. Welser, Waldemar Walter Kocon 2000-03-07 $24,867,000
6034389 Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array Hussein I. Hanafi, Howard L. Kalter, Jeffrey J. Welser, Waldemar Walter Kocon 2000-03-07 $24,867,000
6013548 Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array Hussein I. Hanafi, Howard L. Kalter, Jeffrey J. Welser, Waldemar Walter Kocon 2000-01-11 $34,320,000
5990509 2F-square memory cell for gigabit memory applications Hussein J. Hanafi, Jeffrey J. Welser 1999-11-23 $40,306,000
5976986 Low pressure and low power C1.sub.2 /HC1 process for sub-micron metal etching Munir D. Naeem, Rosemary Christie, Virinder Grewal, Walter W. Kocon, Masaki Narita +2 more 1999-11-02 $18,540,000
5895273 Silicon sidewall etching Hussein I. Hanafi, Waldemar Walter Kocon, Jeffrey J. Welser 1999-04-20 $26,173,000
5874760 4F-square memory cell having vertical floating-gate transistors with self-aligned shallow trench isolation Hussein I. Hanafi, Jeffrey J. Welser, Waldemar Walter Kocon 1999-02-23 $8,993,000
5846884 Methods for metal etching with reduced sidewall build up during integrated circuit manufacturing Munir D. Naeem, Nancy Anne Greco, STEVE GRECO, Virinder Grewal, Ernest N. Levine +2 more 1998-12-08 $52,989,000
5759920 Process for making doped polysilicon layers on sidewalls Hussein I. Hanafi, Waldemar Walter Kocon 1998-06-02 $5,806,000