Issued Patents All Time
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5846884 | Methods for metal etching with reduced sidewall build up during integrated circuit manufacturing | Munir D. Naeem, Stuart M. Burns, Nancy Anne Greco, Virinder Grewal, Ernest N. Levine +2 more | 1998-12-08 |