YT

Yuan Taur

IBM: 15 patents #7,450 of 70,183Top 15%
Overall (All Time): #327,480 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6759710 Self-aligned double-gate MOSFET by selective epitaxy and silicon wafer bonding techniques Kevin K. Chan, Guy M. Cohen, Hon-Sum Philip Wong 2004-07-06
6593617 Field effect transistors with vertical gate side walls and method for making such transistors Diane C. Boyd, Stuart M. Burns, Hussein I. Hanafi, William C. Wille 2003-07-15
6365465 Self-aligned double-gate MOSFET by selective epitaxy and silicon wafer bonding techniques Kevin K. Chan, Guy M. Cohen, Hon-Sum Philip Wong 2002-04-02
6268640 Forming steep lateral doping distribution at source/drain junctions Heemyong Park, Hsing-Jen Wann 2001-07-31
6143635 Field effect transistors with improved implants and method for making such transistors Diane C. Boyd, Stuart M. Burns, Hussein I. Hanafi, William C. Wille 2000-11-07
6040214 Method for making field effect transistors having sub-lithographic gates with vertical side walls Diane C. Boyd, Stuart M. Burns, Hussein I. Hanafi, William C. Wille 2000-03-21
5780327 Vertical double-gate field effect transistor Jack O. Chu, Louis L. Hsu, Jack A. Mandelman, Yuan-Chen Sun 1998-07-14
5767549 SOI CMOS structure Wei Chen, Devendra K. Sadana 1998-06-16
5689127 Vertical double-gate field effect transistor Jack O. Chu, Louis L. Hsu, Jack A. Mandelman, Yuan-Chen Sun 1997-11-18
5646058 Method for fabricating a self-aligned double-gate MOSFET by selective lateral epitaxy Hon-Sum Philip Wong 1997-07-08
5604368 Self-aligned double-gate MOSFET by selective lateral epitaxy Hon-Sum Philip Wong 1997-02-18
5541427 SRAM cell with capacitor Barbara A. Chappell, Bijan Davari, George A. Sai-Halasz 1996-07-30
5298786 SOI lateral bipolar transistor with edge-strapped base contact and method of fabricating same Ghavam G. Shahidi, Denny Tang 1994-03-29
4585342 System for real-time monitoring the characteristics, variations and alignment errors of lithography structures Burn Jeng Lin 1986-04-29
4509991 Single mask process for fabricating CMOS structure — 1985-04-09