Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6700145 | Capacitor with high charge storage capacity | Charles T. Black | 2004-03-02 |
| 6583462 | Vertical DRAM having metallic node conductor | Toshiharu Furukawa, Rajarao Jammy, Thomas S. Kanarsky, David V. Horak, Steven J. Holmes +1 more | 2003-06-24 |
| 6538299 | Silicon-on-insulator (SOI) trench photodiode | Young Hoon Kwark, Dan Moy, Mark B. Ritter, Dennis L. Rogers | 2003-03-25 |
| 6440801 | Structure for folded architecture pillar memory cell | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, Howard L. Kalter +2 more | 2002-08-27 |
| 6376873 | Vertical DRAM cell with robust gate-to-storage node isolation | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, Thomas S. Kanarsky | 2002-04-23 |
| 6316309 | Method of forming self-isolated and self-aligned 4F-square vertical FET-trench DRAM cells | Steven J. Holmes, Howard L. Kalter, Sandip Tiwari | 2001-11-13 |
| 6204140 | Dynamic random access memory | Ulrike Gruening, Jochen Beintner, Scott D. Halle, Jack A. Mandelman, Carl Radens +1 more | 2001-03-20 |
| 6137128 | Self-isolated and self-aligned 4F-square vertical fet-trench dram cells | Steven J. Holmes, Howard L. Kalter, Sandip Tiwari | 2000-10-24 |
| 6114725 | Structure for folded architecture pillar memory cell | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, Howard L. Kalter +2 more | 2000-09-05 |
| 6077745 | Self-aligned diffused source vertical transistors with stack capacitors in a 4F-square memory cell array | Stuart M. Burns, Hussein I. Hanafi, Waldemar Walter Kocon, Howard L. Kalter | 2000-06-20 |
| 6069381 | Ferroelectric memory transistor with resistively coupled floating gate | Charles T. Black | 2000-05-30 |
| 6033957 | 4F-square memory cell having vertical floating-gate transistors with self-aligned shallow trench isolation | Stuart M. Burns, Hussein I. Hanafi, Waldemar Walter Kocon | 2000-03-07 |
| 6034389 | Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array | Stuart M. Burns, Hussein I. Hanafi, Howard L. Kalter, Waldemar Walter Kocon | 2000-03-07 |
| 6013548 | Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array | Stuart M. Burns, Hussein I. Hanafi, Howard L. Kalter, Waldemar Walter Kocon | 2000-01-11 |
| 5998292 | Method for making three dimensional circuit integration | Charles T. Black, Joachim Norbert Burghartz, Sandip Tiwari | 1999-12-07 |
| 5990509 | 2F-square memory cell for gigabit memory applications | Stuart M. Burns, Hussein J. Hanafi | 1999-11-23 |
| 5929477 | Self-aligned diffused source vertical transistors with stack capacitors in a 4F-square memory cell array | Stuart McAllister Burns, Jr., Hussein I. Hanafi, Waldemar Walter Kocon, Howard L. Kalter | 1999-07-27 |
| 5895273 | Silicon sidewall etching | Stuart M. Burns, Hussein I. Hanafi, Waldemar Walter Kocon | 1999-04-20 |
| 5874760 | 4F-square memory cell having vertical floating-gate transistors with self-aligned shallow trench isolation | Stuart M. Burns, Hussein I. Hanafi, Waldemar Walter Kocon | 1999-02-23 |
| 5559912 | Wavelength-selective devices using silicon-on-insulator | Farid Agahi, Bardia Pezeshki, Jeffrey A. Kash | 1996-09-24 |