Issued Patents All Time
Showing 25 most recent of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9895306 | Personal care compositions containing end-functionalized ionic silicone | Alok Sarkar, Anubhav Saxena, Benjamin Falk | 2018-02-20 |
| 9895307 | Personal care compositions containing ionic silicone and film-forming agent | Alok Sarkar, Anubhav Saxena, Benjamin Falk, Anne Dussaud | 2018-02-20 |
| 9389511 | Methods of making patterned structures of materials, patterned structures of materials, and methods of using same | Evan L. Schwartz, Wei Min Chan, Jin-Kyun Lee, Christopher K. Ober | 2016-07-12 |
| 8987701 | Phase transition memories and transistors | Ravishankar Sundararaman, Sang-Hyeon Lee, Moonkyung Kim | 2015-03-24 |
| 8974775 | Silicone ionomer composition | Anubhav Saxena, Alok Sarkar | 2015-03-10 |
| 8893310 | Scanned probe microscopy (SPM) probe having angled tip | Mark C. Reuter, Brian A. Bryce, Bojan Ilic | 2014-11-18 |
| 8553455 | Shape memory device | Chung-woo Kim | 2013-10-08 |
| 8539611 | Scanned probe microscopy (SPM) probe having angled tip | Mark C. Reuter, Brian A. Bryce, Bojan Ilic | 2013-09-17 |
| 8080839 | Electro-mechanical transistor | Moon-kyung Kim, Joshua M. Rubin, Soo Doo Chae, Choong-Man Lee, Ravishankar Sundararaman | 2011-12-20 |
| 7365398 | Compact SRAMs and other multiple transistor structures | Arvind Kumar | 2008-04-29 |
| 7057234 | Scalable nano-transistor and memory using back-side trapping | — | 2006-06-06 |
| 6953958 | Electronic gain cell based charge sensor | Gregory T. Baxter | 2005-10-11 |
| 6800518 | Formation of patterned silicon-on-insulator (SOI)/silicon-on-nothing (SON) composite structure by porous Si engineering | Robert E. Bendernagel, Kwang Su Choe, Bijan Davari, Keith E. Fogel, Devendra K. Sadana +1 more | 2004-10-05 |
| 6756257 | Patterned SOI regions on semiconductor chips | Bijan Davari, Devendra K. Sadana, Ghavam G. Shahidi | 2004-06-29 |
| 6750471 | Molecular memory & logic | Donald S. Bethune | 2004-06-15 |
| 6600173 | Low temperature semiconductor layering and three-dimensional electronic circuits using the layering | — | 2003-07-29 |
| 6534819 | Dense backplane cell for configurable logic | Arvind Kumar | 2003-03-18 |
| 6472705 | Molecular memory & logic | Donald S. Bethune | 2002-10-29 |
| 6445032 | Floating back gate electrically erasable programmable read-only memory(EEPROM) | Arvind Kumar | 2002-09-03 |
| 6350321 | UHV horizontal hot wall cluster CVD/growth design | Kevin K. Chan, Christopher P. D'Emic, Raymond M. Sicina, Paul Kozlowski, Margaret Paggi Manny | 2002-02-26 |
| 6333532 | Patterned SOI regions in semiconductor chips | Bijan Davari, Devendra K. Sadana, Ghavam G. Shahidi | 2001-12-25 |
| 6316309 | Method of forming self-isolated and self-aligned 4F-square vertical FET-trench DRAM cells | Steven J. Holmes, Howard L. Kalter, Jeffrey J. Welser | 2001-11-13 |
| 6281551 | Back-plane for semiconductor device | Kevin K. Chan, Christopher P. D'Emic, Erin C. Jones, Paul M. Solomon | 2001-08-28 |
| 6248626 | Floating back gate electrically erasable programmable read-only memory (EEPROM) | Arvind Kumar | 2001-06-19 |
| 6236060 | Light emitting structures in back-end of line silicon technology | Kevin K. Chan | 2001-05-22 |