Issued Patents All Time
Showing 25 most recent of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12432901 | Technologies for fabricating a vertical DRAM structure | Sang Cheol Han, Sunghil Lee | 2025-09-30 |
| 12256558 | Technologies for fabricating a 3D memory structure | Sang Cheol Han, Sunghil Lee, Iljung Park | 2025-03-18 |
| 12193231 | Fabricating three-dimensional semiconductor structures | Karthikeyan Pillai, Lior Huli, Na Young Bae, Hojin Kim | 2025-01-07 |
| 11990425 | Stress relief in semiconductor wafers | Hojin Kim, Stephen Mancini | 2024-05-21 |
| 11915931 | Extreme ultraviolet lithography patterning method | Choong-Man Lee, Angelique Raley, Qiaowei Lou, Toshio Hasegawa, Yoshihiro Kato | 2024-02-27 |
| 11380697 | Raised pad formations for contacts in three-dimensional structures on microelectronic workpieces | Sang Cheol Han, Youngwoo Park | 2022-07-05 |
| 11243465 | Plasma treatment method to enhance surface adhesion for lithography | Wanjae Park, Lior Huli | 2022-02-08 |
| 10978307 | Deposition process | David L. O'Meara, Eric Chih-Fang Liu, Richard A. Farrell | 2021-04-13 |
| 10923392 | Interconnect structure and method of forming the same | Jeffrey Smith, Gerrit J. Leusink, Robert D. Clark, Kai-Hung Yu | 2021-02-16 |
| 10916561 | Method of fabricating semiconductor device | Karthik Pillai, Sangcheol Han | 2021-02-09 |
| 10770294 | Selective atomic layer deposition (ALD) of protective caps to enhance extreme ultra-violet (EUV) etch resistance | David L. O'Meara, Lior Huli, Wan Jae Park | 2020-09-08 |
| 10580691 | Method of integrated circuit fabrication with dual metal power rail | Kaoru Maekawa, Jeffrey Smith, Nicholas Joy, Gerrit J. Leusink, Kai-Hung Yu | 2020-03-03 |
| 10541174 | Interconnect structure and method of forming the same | Jeffrey Smith, Gerrit J. Leusink, Robert D. Clark, Kai-Hung Yu | 2020-01-21 |
| 10453749 | Method of forming a self-aligned contact using selective SiO2 deposition | Kandabara Tapily, Sangcheol Han | 2019-10-22 |
| 10256095 | Method for high throughput using beam scan size and beam position in gas cluster ion beam processing system | Noel Russell, Joshua LaRose, Nicholas Joy, Luis Fernandez, Allen J. Leith +3 more | 2019-04-09 |
| 10217670 | Wrap-around contact integration scheme | Kandabara Tapily, Satoru Nakamura, Akiteru Ko, Kaoru Maekawa, Gerrit J. Leusink | 2019-02-26 |
| 9875947 | Method of surface profile correction using gas cluster ion beam | Noel Russell, Vincent Gizzo, Joshua LaRose, Nicholas Joy | 2018-01-23 |
| 9500946 | Sidewall spacer patterning method using gas cluster ion beam | Youngdon Chang, Il-seok Song, Noel Russell | 2016-11-22 |
| 9343672 | Nonvolatile memory devices, nonvolatile memory cells and methods of manufacturing nonvolatile memory devices | Chan-Jin Park, Sun-Jung Kim, Soon-Oh Park, Hyun-Su Ju | 2016-05-17 |
| 9123505 | Apparatus and methods for implementing predicted systematic error correction in location specific processing | Vincent Lagana-Gizzo, Noel Russell, Joshua LaRose | 2015-09-01 |
| 9012974 | Vertical memory devices and methods of manufacturing the same | Ki-Hyun Hwang, Han-Mei Choi, Dong-Chul Yoo | 2015-04-21 |
| 8884262 | Non-volatile memory device having a resistance-changeable element and method of forming the same | Hyun-Su Ju, Sun-Jung Kim | 2014-11-11 |
| 8217445 | SONOS memory device using an amorphous memory node material | Sang-hun Jeon, Ju-Hyung Kim, Chung-woo Kim | 2012-07-10 |
| 8139387 | Method of erasing a memory device including complementary nonvolatile memory devices | Yoon-dong Park, Jo-won Lee, Chung-woo Kim, Eun-hong Lee, Sun-ae Seo +3 more | 2012-03-20 |
| 8080839 | Electro-mechanical transistor | Sandip Tiwari, Moon-kyung Kim, Joshua M. Rubin, Choong-Man Lee, Ravishankar Sundararaman | 2011-12-20 |