Issued Patents All Time
Showing 25 most recent of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6730529 | Method for chip testing | H. Bernhard Pogge, George S. Prokop, Donald L. Wheater | 2004-05-04 |
| 6440801 | Structure for folded architecture pillar memory cell | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, Jack A. Mandelman +2 more | 2002-08-27 |
| 6429080 | Multi-level dram trench store utilizing two capacitors and two plates | Toshiharu Furukawa, David V. Horak | 2002-08-06 |
| 6426904 | Structures for wafer level test and burn-in | John E. Barth, Jr., Claude L. Bertin, Jeffrey H. Dreibelbis, Wayne F. Ellis, Wayne J. Howell +3 more | 2002-07-30 |
| 6369671 | Voltage controlled transmission line with real-time adaptive control | Claude L. Bertin, Anthony R. Bonaccio, Thomas M. Maffitt, Jack A. Mandelman, Edward J. Nowak +1 more | 2002-04-09 |
| 6345380 | Interconnected integrated circuits having reduced inductance during switching and a method of interconnecting such circuits | Anthony R. Bonaccio, William R. Tonti | 2002-02-05 |
| 6316309 | Method of forming self-isolated and self-aligned 4F-square vertical FET-trench DRAM cells | Steven J. Holmes, Sandip Tiwari, Jeffrey J. Welser | 2001-11-13 |
| 6294942 | Method and apparatus for providing self-terminating signal lines | Claude L. Bertin, Anthony R. Bonaccio, William R. Tonti | 2001-09-25 |
| 6282115 | Multi-level DRAM trench store utilizing two capacitors and two plates | Toshiharu Furukawa, David V. Horak | 2001-08-28 |
| 6255899 | Method and apparatus for increasing interchip communications rates | Claude L. Bertin, Anthony R. Bonaccio, Erik L. Hedberg, Thomas M. Maffitt, Jack A. Mandelman +2 more | 2001-07-03 |
| 6233184 | Structures for wafer level test and burn-in | John E. Barth, Jr., Claude L. Bertin, Jeffrey H. Dreibelbis, Wayne F. Ellis, Wayne J. Howell +3 more | 2001-05-15 |
| 6177809 | Redundant input/output driver circuit | William R. Tonti, Jack A. Mandelman, Anthony R. Bonaccio, Claude L. Bertin, John A. Fifield | 2001-01-23 |
| 6177818 | Complementary depletion switch body stack off-chip driver | Claude L. Bertin, Anthony R. Bonaccio, Thomas M. Maffitt, Jack A. Mandelman, William R. Tonti | 2001-01-23 |
| 6137128 | Self-isolated and self-aligned 4F-square vertical fet-trench dram cells | Steven J. Holmes, Sandip Tiwari, Jeffrey J. Welser | 2000-10-24 |
| 6114725 | Structure for folded architecture pillar memory cell | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, Jack A. Mandelman +2 more | 2000-09-05 |
| 6087199 | Method for fabricating a very dense chip package | H. Bernhard Pogge, Bijan Davari, Johann Greschner | 2000-07-11 |
| 6077745 | Self-aligned diffused source vertical transistors with stack capacitors in a 4F-square memory cell array | Stuart M. Burns, Hussein I. Hanafi, Jeffrey J. Welser, Waldemar Walter Kocon | 2000-06-20 |
| 6044024 | Interactive method for self-adjusted access on embedded DRAM memory macros | John E. Barth, Jr., Jeffrey H. Dreibelbis | 2000-03-28 |
| 6034389 | Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array | Stuart M. Burns, Hussein I. Hanafi, Jeffrey J. Welser, Waldemar Walter Kocon | 2000-03-07 |
| 6013548 | Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array | Stuart M. Burns, Hussein I. Hanafi, Jeffrey J. Welser, Waldemar Walter Kocon | 2000-01-11 |
| 5998868 | Very dense chip package | H. Bernhard Pogge, Bijan Davari, Johann Greschner | 1999-12-07 |
| 5972745 | Method or forming self-aligned halo-isolated wells | Edward J. Nowak, Xiaowei Tian, Minh H. Tong, William R. Tonti | 1999-10-26 |
| 5961653 | Processor based BIST for an embedded memory | John E. Barth, Jr., Jeffrey H. Dreibelbis, Rex Kho, John Stuart Parenteau, Jr., Donald L. Wheater +1 more | 1999-10-05 |
| 5929477 | Self-aligned diffused source vertical transistors with stack capacitors in a 4F-square memory cell array | Stuart McAllister Burns, Jr., Hussein I. Hanafi, Jeffrey J. Welser, Waldemar Walter Kocon | 1999-07-27 |
| 5925924 | Methods for precise definition of integrated circuit chip edges | John Cronin, Wayne J. Howell, Patricia E. Marmillion, Anthony M. Palagonia, Bernadette Ann Pierson +1 more | 1999-07-20 |