| 11152063 |
Writing multiple levels in a phase change memory |
Chung H. Lam, Scott C. Lewis, Jack Morrish |
2021-10-19 |
$2,168,000 |
| 10998045 |
Writing multiple levels in a phase change memory |
Chung H. Lam, Scott C. Lewis, Jack Morrish |
2021-05-04 |
$7,263,000 |
| 10943658 |
Writing multiple levels in a phase change memory |
Chung H. Lam, Scott C. Lewis, Jack Morrish |
2021-03-09 |
$4,710,000 |
| 10937496 |
Writing multiple levels in a phase change memory |
Chung H. Lam, Scott C. Lewis, Jack Morrish |
2021-03-02 |
$2,720,000 |
| 10762959 |
Writing multiple levels in a phase change memory |
Chung H. Lam, Scott C. Lewis, Jack Morrish |
2020-09-01 |
$3,521,000 |
| 10726897 |
Trimming MRAM sense amp with offset cancellation |
John K. DeBrosse, Matthew R. Wordeman |
2020-07-28 |
$3,400,000 |
| 10726898 |
MRAM sense amplifier with second stage offset cancellation |
John Kenneth Debrose |
2020-07-28 |
$3,400,000 |
| 10692576 |
Writing multiple levels in a phase change memory |
Chung H. Lam, Scott C. Lewis, Jack Morrish |
2020-06-23 |
$2,380,000 |
| 10658022 |
High gain sense amplifier with offset cancellation for magnetoresistive random access memory |
— |
2020-05-19 |
$2,035,000 |
| 10566057 |
Writing multiple levels in a phase change memory |
Chung H. Lam, Scott C. Lewis, Jack Morrish |
2020-02-18 |
$2,353,000 |
| 10535403 |
Writing multiple levels in a phase change memory |
Chung H. Lam, Scott C. Lewis, Jack Morrish |
2020-01-14 |
$2,827,000 |
| 10424375 |
Writing multiple levels in a phase change memory |
Chung H. Lam, Scott C. Lewis, Jack Morrish |
2019-09-24 |
$3,094,000 |
| 10037802 |
Phase change memory with an incrementally ramped write-reference voltage and an incrementally ramped read-reference voltage |
Chung H. Lam, Scott C. Lewis, Jack Morrish |
2018-07-31 |
$5,084,000 |
| 9911492 |
Writing multiple levels in a phase change memory using a write reference voltage that incrementally ramps over a write period |
Chung H. Lam, Scott C. Lewis, Jack Morrish |
2018-03-06 |
$2,330,000 |
| 9704575 |
Content-addressable memory having multiple reference matchlines to reduce latency |
Igor Arsovski, Michael T. Fragano, Robert M. Houle |
2017-07-11 |
$13,027,000 |
| 9601200 |
TCAM structures with reduced power supply noise |
Igor Arsovski, Michael T. Fragano |
2017-03-21 |
$11,989,000 |
| 9583192 |
Matchline precharge architecture for self-reference matchline sensing |
Igor Arsovski, Michael T. Fragano, Robert M. Houle |
2017-02-28 |
$11,370,000 |
| 9502107 |
Writing multiple levels in a phase change memory |
Chung H. Lam, Scott C. Lewis, Jack Morrish |
2016-11-22 |
$3,414,000 |
| 9384792 |
Offset-cancelling self-reference STT-MRAM sense amplifier |
Anthony R. Bonaccio, John K. DeBrosse |
2016-07-05 |
$2,704,000 |
| 9299431 |
Writing multiple levels in a phase change memory using a write/read reference voltage ramping up over a write/read period |
Chung H. Lam, Scott C. Lewis, Jack Morrish |
2016-03-29 |
$2,226,000 |
| 8520458 |
Phase change memory cycle timer and method |
John A. Gabric, Mark C. H. Lamorey |
2013-08-27 |
$5,858,000 |
| 8345475 |
Non volatile cell and architecture with single bit random access read, program and erase |
Chung H. Lam, Mark C. H. Lamorey |
2013-01-01 |
|
| 8300489 |
Charge pump system and method utilizing adjustable output charge and compilation system and method for use by the charge pump |
John A. Fifield, Dale E. Pontius |
2012-10-30 |
|
| 8233345 |
Phase change memory cycle timer and method |
John A. Gabric, Mark C. H. Lamorey |
2012-07-31 |
$5,473,000 |
| 7882455 |
Circuit and method using distributed phase change elements for across-chip temperature profiling |
Nazmul Habib, Mark C. H. Lamorey, Robert McMahon |
2011-02-01 |
$3,711,000 |
