Issued Patents All Time
Showing 25 most recent of 501 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| RE50181 | Isolation region fabrication for replacement gate processing | Brent A. Anderson | 2024-10-22 |
| RE48616 | Isolation region fabrication for replacement gate processing | Brent A. Anderson | 2021-06-29 |
| 11024546 | Vertical field effect transistors | Brent A. Anderson | 2021-06-01 |
| 10957799 | Transistor channel having vertically stacked nanosheets coupled by fin-shaped bridge regions | Ruilong Xie, Julien Frougier, Chanro Park, Yi Qi, Kangguo Cheng +1 more | 2021-03-23 |
| 10943831 | Vertical field effect transistors | Brent A. Anderson | 2021-03-09 |
| 10909443 | Neuromorphic circuit structure and method to form same | Siva P. Adusumilli, Ruilong Xie, Julien Frougier | 2021-02-02 |
| 10903361 | Fabrication of a vertical field effect transistor device with a modified vertical fin geometry | Brent A. Anderson | 2021-01-26 |
| 10903369 | Transistor channel having vertically stacked nanosheets coupled by fin-shaped bridge regions | Ruilong Xie, Julien Frougier, Chanro Park, Yi Qi, Kangguo Cheng +1 more | 2021-01-26 |
| 10896857 | Vertical field effect transistors | Brent A. Anderson | 2021-01-19 |
| 10879112 | Self-aligned via forming to conductive line and related wiring structure | Brent A. Anderson | 2020-12-29 |
| 10727253 | Simplified memory cells based on fully-depleted silicon-on-insulator transistors | — | 2020-07-28 |
| 10714616 | FINFET having a gate structure in a trench feature in a bent fin | Brent A. Anderson, Andres Bryant | 2020-07-14 |
| 10714396 | Variable gate lengths for vertical transistors | Brent A. Anderson | 2020-07-14 |
| 10699961 | Isolation techniques for high-voltage device structures | Jagar Singh | 2020-06-30 |
| 10658390 | Virtual drain for decreased harmonic generation in fully depleted SOI (FDSOI) RF switches | Richard F. Taylor, III, Tamilmani Ethirajan | 2020-05-19 |
| 10636876 | Devices with channel extension regions | Lars Müller-Meskamp, Luca Pirro | 2020-04-28 |
| 10629703 | Sloped finFET with methods of forming same | Brent A. Anderson | 2020-04-21 |
| 10622477 | Fabrication of a vertical field effect transistor device with a modified vertical fin geometry | Brent A. Anderson | 2020-04-14 |
| 10573562 | Integrating a planar field effect transistor (FET) with a vertical FET | Brent A. Anderson | 2020-02-25 |
| 10529627 | Vertical field effect transistors | Brent A. Anderson | 2020-01-07 |
| 10424516 | Integrating a planar field effect transistor (FET) with a vertical FET | Brent A. Anderson | 2019-09-24 |
| 10418484 | Vertical field effect transistors incorporating U-shaped semiconductor bodies and methods | Ruilong Xie, Lars Liebmann, Julien Frougier, Jia Zeng | 2019-09-17 |
| 10395992 | Variable gate lengths for vertical transistors | Brent A. Anderson | 2019-08-27 |
| 10381459 | Transistors with H-shaped or U-shaped channels and method for forming the same | Ruilong Xie, Julien Frougier, Yi Qi, Nigel G. Cave, Andreas Knorr | 2019-08-13 |
| 10373942 | Logic layout with reduced area and method of making the same | Ram Asra, Mohit Bajaj, Kota V. R. M. Murali | 2019-08-06 |