Issued Patents All Time
Showing 1–25 of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424501 | Semiconductor package including a chip-substrate composite semiconductor device | Barbara Angela Glanzer, Andreas Riegler | 2025-09-23 |
| 12368052 | Chip-substrate composite semiconductor device | Barbara Angela Glanzer, Andreas Riegler | 2025-07-22 |
| 12273098 | Method for operating a power transistor circuit | Matteo-Alessandro Kutschak, Otto Wiedenbauer, Winfried Kaindl, Hans Weber | 2025-04-08 |
| 12176172 | Power relay circuit | Ingo Muri | 2024-12-24 |
| 12014973 | Multi-die-package and method | Andreas Riegler | 2024-06-18 |
| 11869966 | Method for forming an insulation layer in a semiconductor body and transistor device | Hans Weber, Franz Hirler, Winfried Kaindl, Markus Rochel | 2024-01-09 |
| 11527468 | Semiconductor oxide or glass based connection body with wiring structure | Andreas Riegler, Matteo-Alessandro Kutschak, Carsten von Koblinski, Hans Weber | 2022-12-13 |
| 11508841 | Semiconductor device | Franz Hirler, Winfried Kaindl, Hans Weber | 2022-11-22 |
| 11329126 | Method of manufacturing a superjunction semiconductor device | Armin Tilke, Hans Weber, Roman Knoefler, Gabor Mezoesi, Manfred Pippan +3 more | 2022-05-10 |
| 11211483 | Method for forming an insulation layer in a semiconductor body and transistor device | Hans Weber, Franz Hirler, Winfried Kaindl, Markus Rochel | 2021-12-28 |
| 11139125 | Power relay circuit | Ingo Muri | 2021-10-05 |
| 11088275 | Method for operating a superjunction transistor device | Hans Weber, Franz Hirler, Matteo-Alessandro Kutschak, Andreas Riegler | 2021-08-10 |
| 11081430 | Multi-die-package and method | Andreas Riegler | 2021-08-03 |
| 10811529 | Transistor device with gate resistor | Andreas Riegler, Bjoern Fischer, Franz Hirler, Gabor Mezoesi, Hans Weber | 2020-10-20 |
| 10651271 | Charge compensation semiconductor devices | Daniel Tutuc, Franz Hirler, Maximilian Treiber | 2020-05-12 |
| 10411126 | Semiconductor device having a first through contact structure in ohmic contact with the gate electrode | Andreas Riegler, Gabor Mezoesi, Hans Weber | 2019-09-10 |
| 10374032 | Field-effect semiconductor device having N and P-doped pillar regions | Hans Weber, Gabor Mezoesi, Andreas Riegler | 2019-08-06 |
| 10224394 | Superjunction semiconductor device having a superstructure | Hans Weber, Daniel Tutuc, Andreas Voerckel | 2019-03-05 |
| 10157982 | Charge compensation semiconductor devices | Daniel Tutuc, Franz Hirler, Maximilian Treiber | 2018-12-18 |
| 9905639 | Method of manufacturing superjunction semiconductor devices with a superstructure in alignment with a foundation | Hans Weber, Daniel Tutuc, Andreas Voerckel | 2018-02-27 |
| 9812373 | Semiconductor package with top side cooling heat sink thermal pathway | Ralf Otremba, Klaus Schiess, Franz Stueckler | 2017-11-07 |
| 9773736 | Intermediate layer for copper structuring and methods of formation thereof | Ravi Keshav Joshi, Juergen Steinbrenner, Petra Fischer, Roman Roth | 2017-09-26 |
| 9679895 | Semiconductor device having switchable regions with different transconductances | Enrique Vecino Vazquez, Armin Willmeroth | 2017-06-13 |
| 9583395 | Method for manufacturing a semiconductor switching device with different local cell geometry | Enrique Vecino Vazquez | 2017-02-28 |
| 9349795 | Semiconductor switching device with different local threshold voltage | Enrique Vecino Vazquez | 2016-05-24 |