| 12446290 |
Asymmetric gate extension in stacked FET |
Ruinan Xie, Brent A. Anderson, Junli Wang, Albert M. Chu |
2025-10-14 |
|
| 12356711 |
Late gate extension |
Ruilong Xie, Christopher J. Waskiewicz, Hemanth Jagannathan, Brent A. Anderson |
2025-07-08 |
|
| 12310090 |
CMOS top source/drain region doping and epitaxial growth for a vertical field effect transistor |
Heng Wu, Ruilong Xie, Su Chen Fan, Hemanth Jagannathan |
2025-05-20 |
|
| 12268030 |
Self-aligned C-shaped vertical field effect transistor |
Ruilong Xie, Robert R. Robison, Hemanth Jagannathan |
2025-04-01 |
|
| 12183740 |
Stacked field-effect transistors |
Ruilong Xie, Kangguo Cheng, Curtis S. Durfee, Min Gyu Sung, Julien Frougier +1 more |
2024-12-31 |
$22,533,000 |
| 11973125 |
Self-aligned uniform bottom spacers for VTFETS |
Ruilong Xie, Hemanth Jagannathan, Eric R. Miller |
2024-04-30 |
$14,003,000 |
| 11646373 |
Vertical field effect transistor with bottom spacer |
Christopher J. Waskiewicz, Ruilong Xie, Hemanth Jagannathan |
2023-05-09 |
$3,203,000 |
| 11615990 |
CMOS top source/drain region doping and epitaxial growth for a vertical field effect transistor |
Heng Wu, Ruilong Xie, Su Chen Fan, Hemanth Jagannathan |
2023-03-28 |
$13,323,000 |
| 11251287 |
Self-aligned uniform bottom spacers for VTFETS |
Ruilong Xie, Hemanth Jagannathan, Eric R. Miller |
2022-02-15 |
$5,512,000 |
| 11239119 |
Replacement bottom spacer for vertical transport field effect transistors |
Ruilong Xie, Heng Wu, Hemanth Jagannathan, Lan Yu, Tao Li |
2022-02-01 |
$4,586,000 |
| 11217692 |
Vertical field effect transistor with bottom spacer |
Christopher J. Waskiewicz, Ruilong Xie, Hemanth Jagannathan |
2022-01-04 |
$22,913,000 |
| 11189532 |
Dual width finned semiconductor structure |
Yi Song, Eric R. Miller, Fee Li Lie, Richard A. Conti |
2021-11-30 |
$2,996,000 |
| 11043429 |
Semiconductor fins with dielectric isolation at fin bottom |
Peng Xu, Kangguo Cheng |
2021-06-22 |
$6,016,000 |
| 10892193 |
Controlling active fin height of FinFET device |
Yi Song, Veeraraghavan S. Baskar, Ekmini Anuja De Silva |
2021-01-12 |
$3,912,000 |
| 10770361 |
Controlling active fin height of FinFET device using etch protection layer to prevent recess of isolation layer during gate oxide removal |
Yi Song, Veeraraghavan S. Baskar, Ekmini Anuja De Silva |
2020-09-08 |
$3,136,000 |
| 10672668 |
Dual width finned semiconductor structure |
Yi Song, Eric R. Miller, Fee Li Lie, Richard A. Conti |
2020-06-02 |
$2,290,000 |
| 10665514 |
Controlling active fin height of FinFET device using etch protection layer to prevent recess of isolation layer during gate oxide removal |
Yi Song, Veeraraghavan S. Baskar, Ekmini Anuja De Silva |
2020-05-26 |
$2,933,000 |
| 10636709 |
Semiconductor fins with dielectric isolation at fin bottom |
Peng Xu, Kangguo Cheng |
2020-04-28 |
$4,123,000 |
| 10586700 |
Protection of low temperature isolation fill |
Michael P. Belyansky, Richard A. Conti, Dechao Guo, Devendra K. Sadana |
2020-03-10 |
$1,254,000 |
| 10535550 |
Protection of low temperature isolation fill |
Michael P. Belyansky, Richard A. Conti, Dechao Guo, Devendra K. Sadana |
2020-01-14 |
$2,827,000 |
| 9984916 |
Uniform dielectric recess depth during fin reveal |
Benjamin D. Briggs, Lawrence A. Clevenger, Michael Rizzolo |
2018-05-29 |
$2,015,000 |
| 9984935 |
Uniform dielectric recess depth during fin reveal |
Benjamin D. Briggs, Lawrence A. Clevenger, Michael Rizzolo |
2018-05-29 |
$2,015,000 |
| 9941134 |
Uniform dielectric recess depth during fin reveal |
Benjamin D. Briggs, Lawrence A. Clevenger, Michael Rizzolo |
2018-04-10 |
$2,135,000 |
| 9666474 |
Uniform dielectric recess depth during fin reveal |
Benjamin D. Briggs, Lawrence A. Clevenger, Michael Rizzolo |
2017-05-30 |
$1,983,000 |
| 8685809 |
Semiconductor structures having improved contact resistance |
Bruce B. Doris, Carl Radens, Anthony K. Stamper |
2014-04-01 |
$5,095,000 |
