Issued Patents All Time
Showing 25 most recent of 633 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12336285 | Field effect transistor with shallow trench isolation features within source/drain regions | Uzma Rana, Siva P. Adusumilli, Steven M. Shank | 2025-06-17 |
| 12324227 | Heterojunction bipolar transistor with buried trap rich isolation region | Vibhor Jain, John J. Ellis-Monaghan, Steven M. Shank, John J. Pekarik | 2025-06-03 |
| 12317562 | High electron mobility transistors having barrier liners and integration schemes | Ramsey Hazbun, Zhong-Xiang He, Pernell Dongmo | 2025-05-27 |
| 12243923 | Contact-over-active-gate transistor structures with contacts landed on enlarged gate portions | Steven M. Shank, Venkata Narayana Rao Vanukuru, Mark D. Levy | 2025-03-04 |
| 12170313 | Heterojunction bipolar transistor with buried trap rich isolation region | Vibhor Jain, John J. Ellis-Monaghan, Steven M. Shank, Rajendran Krishnasamy | 2024-12-17 |
| 12142686 | Field effect transistor | Uzma Rana, Steven M. Shank, Mark D. Levy | 2024-11-12 |
| 12119352 | IC structure including porous semiconductor layer in bulk substrate adjacent trench isolation | Uzma Rana, Steven M. Shank | 2024-10-15 |
| 12027582 | IC structure including porous semiconductor layer under trench isolation | Uzma Rana, Steven M. Shank | 2024-07-02 |
| 12027580 | Semiconductor on insulator wafer with cavity structures | Siva P. Adusumilli, Bruce W. Porth, John J. Ellis-Monaghan | 2024-07-02 |
| 11876123 | Heterojunction bipolar transistors with stress material for improved mobility | Vibhor Jain, Renata Camillo-Castillo | 2024-01-16 |
| 11848192 | Heterojunction bipolar transistor with emitter base junction oxide interface | Vibhor Jain, Steven M. Shank, John J. Pekarik | 2023-12-19 |
| 11823948 | Bulk wafer switch isolation | Uzma Rana, Steven M. Shank, Brett T. Cucci | 2023-11-21 |
| 11817479 | Transistor with air gap under raised source/drain region in bulk semiconductor substrate | Uzma Rana, Steven M. Shank | 2023-11-14 |
| 11791334 | Heterojunction bipolar transistor with buried trap rich isolation region | Vibhor Jain, John J. Ellis-Monaghan, Steven M. Shank, John J. Pekarik | 2023-10-17 |
| 11764225 | Field effect transistor with shallow trench isolation features within source/drain regions | Uzma Rana, Siva P. Adusumilli, Steven M. Shank | 2023-09-19 |
| 11749717 | Transistor with embedded isolation layer in bulk substrate | Uzma Rana, Johnatan A. Kantarovsky, Steven M. Shank, Siva P. Adusumilli | 2023-09-05 |
| 11749559 | Bulk substrates with a self-aligned buried polycrystalline layer | Steven M. Shank, Ian McCallum-Cook, Siva P. Adusumilli | 2023-09-05 |
| 11749599 | Dual thickness fuse structures | John J. Pekarik, Vibhor Jain | 2023-09-05 |
| 11728348 | Vertically stacked field effect transistors | Steven M. Shank, Siva P. Adusumilli, Michel J. Abou-Khalil | 2023-08-15 |
| 11721719 | Heterojunction bipolar transistor with buried trap rich isolation region | Vibhor Jain, John J. Ellis-Monaghan, Steven M. Shank, Rajendran Krishnasamy | 2023-08-08 |
| 11710655 | Integrated circuit structure with semiconductor-based isolation structure and methods to form same | Henry L. Aldridge, Jr., Johnatan A. Kantarovsky, Jeonghyun Hwang | 2023-07-25 |
| 11677000 | IC structure including porous semiconductor layer under trench isolations adjacent source/drain regions | Uzma Rana, Steven M. Shank | 2023-06-13 |
| 11658177 | Semiconductor device structures with a substrate biasing scheme | Michel J. Abou-Khalil, John J. Ellis-Monaghan, Randy L. Wolf, Alvin J. Joseph, Aaron L. Vallett | 2023-05-23 |
| 11639895 | Device including optofluidic sensor with integrated photodiode | Vibhor Jain, Steven M. Shank, John J. Ellis-Monaghan, John J. Pekarik, Yusheng Bian | 2023-05-02 |
| 11637068 | Thermally and electrically conductive interconnects | Vibhor Jain, Steven M. Shank, John J. Ellis-Monaghan, John J. Pekarik | 2023-04-25 |