Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12339247 | Field effect transistor with buried fluid-based gate and method | Mark D. Levy, Siva P. Adusumilli | 2025-06-24 |
| 12230673 | Field-effect transistors having a gate electrode positioned inside a substrate recess | Michel J. Abou-Khalil, Steven M. Shank, Sarah A. McTaggart, Rajendran Krishnasamy | 2025-02-18 |
| 12199147 | Semiconductor device including a body contact region and method of forming the same | Vvss Satyasuresh Choppalli, Anupam Dutta | 2025-01-14 |
| 11658177 | Semiconductor device structures with a substrate biasing scheme | Anthony K. Stamper, Michel J. Abou-Khalil, John J. Ellis-Monaghan, Randy L. Wolf, Alvin J. Joseph | 2023-05-23 |
| 11315825 | Semiconductor structures including stacked depleted and high resistivity regions | Michel J. Abou-Khalil, Steven M. Shank, Bojidha Babu, John J. Ellis-Monaghan, Anthony K. Stamper | 2022-04-26 |
| 11316045 | Vertical field effect transistor (FET) with source and drain structures | Anthony K. Stamper, Steven M. Shank, John J. Ellis-Monaghan | 2022-04-26 |
| 10211324 | Vertical p-type, n-type, p-type (PNP) junction integrated circuit (IC) structure | Joseph R. Greco, Qizhi Liu, Robert F. Vatter | 2019-02-19 |
| 9837514 | Vertical P-type, N-type, P-type (PNP) junction integrated circuit (IC) structure | Joseph R. Greco, Qizhi Liu, Robert F. Vatter | 2017-12-05 |
| 9735259 | Method to build vertical PNP in a BiCMOS technology with improved speed | Joseph R. Greco, Qizhi Liu, Robert F. Vatter | 2017-08-15 |
| 9324828 | Vertical P-type, N-type, P-type (PNP) junction integrated circuit (IC) structure, and methods of forming | Joseph R. Greco, Qizhi Liu, Robert F. Vatter | 2016-04-26 |