Issued Patents All Time
Showing 25 most recent of 145 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12362172 | Integration of compound-semiconductor-based devices and silicon-based devices | Ramsey Hazbun, Mark D. Levy, Siva P. Adusumilli | 2025-07-15 |
| 12342626 | Switches in bulk substrate | Mark D. Levy, Siva P. Adusumilli, Ramsey Hazbun | 2025-06-24 |
| 12278269 | Bipolar transistor with stepped emitter | Uppili S. Raghunathan, Vibhor Jain, Qizhi Liu, Yves T. Ngu, Ajay Raman +1 more | 2025-04-15 |
| 12131904 | Semiconductor structure with semiconductor-on-insulator region and method | Ramsey Hazbun, Siva P. Adusumilli, Cameron E. Luce | 2024-10-29 |
| 12062574 | Integrated circuit structure with through-metal through-substrate interconnect and method | Zhong-Xiang He, Richard J. Rassel, Ramsey Hazbun, Jeonghyun Hwang, Mark D. Levy | 2024-08-13 |
| 12027553 | Photodetector with buried airgap reflectors | Siva P. Adusumilli, Vibhor Jain, Steven M. Shank | 2024-07-02 |
| 11862717 | Lateral bipolar transistor structure with superlattice layer and method to form same | Vibhor Jain, John J. Pekarik, Alexander M. Derrickson, Judson R. Holt | 2024-01-02 |
| 11862511 | Field-effect transistors with a crystalline body embedded in a trench isolation region | Steven M. Shank, Siva P. Adusumilli | 2024-01-02 |
| 11842940 | Semiconductor structure having a thermal shunt below a metallization layer and integration schemes | Ramsey Hazbun, Siva P. Adusumilli, Mark D. Levy | 2023-12-12 |
| 11837653 | Lateral bipolar junction transistor including a stress layer and method | Jagar Singh, Alexander M. Derrickson, Andreas Knorr, Judson R. Holt | 2023-12-05 |
| 11764060 | Field-effect transistors with a body pedestal | Michel J. Abou-Khalil, Steven M. Shank, Michael J. Zierak | 2023-09-19 |
| 11658177 | Semiconductor device structures with a substrate biasing scheme | Anthony K. Stamper, Michel J. Abou-Khalil, John J. Ellis-Monaghan, Randy L. Wolf, Aaron L. Vallett | 2023-05-23 |
| 11637181 | Lateral bipolar transistors with polysilicon terminals | Vibhor Jain, Alexander M. Derrickson, Judson R. Holt, John J. Pekarik | 2023-04-25 |
| 11605649 | Switches in bulk substrate | Mark D. Levy, Siva P. Adusumilli, Ramsey Hazbun | 2023-03-14 |
| 11569170 | Substrate with a buried conductor under an active region for enhanced thermal conductivity and RF shielding | Siva P. Adusumilli, Mark D. Levy, Ramsey Hazbun, Steven Bentley | 2023-01-31 |
| 11515158 | Semiconductor structure with semiconductor-on-insulator region and method | Ramsey Hazbun, Siva P. Adusumilli, Cameron E. Luce | 2022-11-29 |
| 11476289 | Photodetector with buried airgap reflectors | Siva P. Adusumilli, Vibhor Jain, Steven M. Shank | 2022-10-18 |
| 11387353 | Structure providing charge controlled electronic fuse | Jagar Singh, Sudarshan Narayanan, William J. Taylor, Jr., Jeffrey B. Johnson | 2022-07-12 |
| 11355409 | Chip package with emitter finger cells spaced by different spacings from a heat sink to provide reduced temperature variation | Hanyi Ding, Vibhor Jain, Anthony K. Stamper | 2022-06-07 |
| 11264457 | Isolation trenches augmented with a trap-rich layer | Mark D. Levy, Siva P. Adusumilli, Steven M. Shank, Anthony K. Stamper | 2022-03-01 |
| 11195715 | Epitaxial growth constrained by a template | Siva P. Adusumilli, Cameron E. Luce, Ramsey Hazbun, Mark D. Levy, Anthony K. Stamper | 2021-12-07 |
| 10692753 | Semiconductor structure with airgap | Mark D. Jaffe, Qizhi Liu, Anthony K. Stamper | 2020-06-23 |
| 10644654 | Hybrid cascode constructions with multiple transistor types | Vibhor Jain, Anthony K. Stamper, John J. Pekarik | 2020-05-05 |
| 10439053 | Cascode heterojunction bipolar transistor | Vibhor Jain, Qizhi Liu | 2019-10-08 |
| 10367083 | Compact device structures for a bipolar junction transistor | Vibhor Jain, Renata Camillo-Castillo, Qizhi Liu, John J. Pekarik, Peter B. Gray | 2019-07-30 |