Issued Patents All Time
Showing 25 most recent of 136 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12336206 | Heterojunction bipolar transistors with a cut stress liner | Vibhor Jain, Viorel Ontalus, John J. Pekarik | 2025-06-17 |
| 12295161 | Trench isolation having three portions with different materials, and LDMOS FET including same | Rong-Ting Liou, Man Gu, Wang Zheng, Jagar Singh, Haiting Wang | 2025-05-06 |
| 12191351 | Laterally-diffused metal-oxide-semiconductor devices with an air gap | Bong Woong Mun | 2025-01-07 |
| 12007269 | Weight measuring shovel | — | 2024-06-11 |
| 11894450 | Lateral bipolar transistor with emitter and collector regions including portions within In-insulator layer cavities and method | Shesh Mani Pandey | 2024-02-06 |
| 11749747 | Bipolar transistor structure with collector on polycrystalline isolation layer and methods to form same | Judson R. Holt, Vibhor Jain, John J. Pekarik | 2023-09-05 |
| 11721722 | Bipolar junction transistors including a stress liner | Man Gu, Jagar Singh, Haiting Wang | 2023-08-08 |
| 11396791 | Equalizing cartridge for a flapper valve | — | 2022-07-26 |
| 11387353 | Structure providing charge controlled electronic fuse | Jagar Singh, Sudarshan Narayanan, Alvin J. Joseph, William J. Taylor, Jr. | 2022-07-12 |
| 10626703 | Safety valve coupling and method of manufacturing valve | — | 2020-04-21 |
| 10482200 | Modeling random dopant fluctuations in semiconductor devices | Samarth Agarwal, Abhisek Dixit | 2019-11-19 |
| 10325913 | Method, apparatus, and system having super steep retrograde well with engineered dopant profiles | David Paul Brunco | 2019-06-18 |
| 10269707 | Semiconductor structures with field effect transistor(s) having low-resistance source/drain contact(s) | Brent A. Anderson, Edward J. Nowak | 2019-04-23 |
| 10056408 | Structure and method to form a FinFET device | Andres Bryant, Effendi Leobandung, Tenko Yamashita | 2018-08-21 |
| 9911740 | Method, apparatus, and system having super steep retrograde well with engineered dopant profiles | David Paul Brunco | 2018-03-06 |
| 9786751 | Semiconductor structures with field effect transistor(s) having low-resistance source/drain contact(s) | Brent A. Anderson, Edward J. Nowak | 2017-10-10 |
| 9525069 | Structure and method to form a FinFET device | Andres Bryant, Effendi Leobandung, Tenko Yamashita | 2016-12-20 |
| 9496394 | Semiconductor structures with field effect transistor(s) having low-resistance source/drain contact(s) | Brent A. Anderson, Edward J. Nowak | 2016-11-15 |
| 9484269 | Structure and method to control bottom corner threshold in an SOI device | Joseph Ervin, Kevin McStay, Paul C. Parries, Chengwen Pei, Geng Wang +1 more | 2016-11-01 |
| 9312274 | Merged fin structures for finFET devices | Andres Bryant, Brian J. Greene, Mickey H. Yu | 2016-04-12 |
| 9196712 | FinFET extension regions | Mohammad Hasanuzzaman, Kam-Leung Lee | 2015-11-24 |
| 9105742 | Dual epitaxial process including spacer adjustment | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2015-08-11 |
| 9105718 | Butted SOI junction isolation structures and devices and method of fabrication | Shreesh Narasimha, Hasan M. Nayfeh, Viorel Ontalus, Robert R. Robison | 2015-08-11 |
| 9059281 | Dual L-shaped drift regions in an LDMOS device and method of making the same | David G. Brochu, JR., John J. Ellis-Monaghan, Michael J. Hauser, Xuefeng Liu | 2015-06-16 |
| 9059138 | Heterojunction bipolar transistor with reduced sub-collector length, method of manufacture and design structure | Renata Camillo-Castillo, Zhong-Xiang He, Qizhi Liu, Xuefeng Liu | 2015-06-16 |