Issued Patents All Time
Showing 51–75 of 633 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11264499 | Transistor devices with source/drain regions comprising an interface layer that comprises a non-semiconductor material | John J. Pekarik, Steven M. Shank, Vibhor Jain, John J. Ellis-Monaghan | 2022-03-01 |
| 11264457 | Isolation trenches augmented with a trap-rich layer | Mark D. Levy, Siva P. Adusumilli, Steven M. Shank, Alvin J. Joseph | 2022-03-01 |
| 11195715 | Epitaxial growth constrained by a template | Siva P. Adusumilli, Cameron E. Luce, Ramsey Hazbun, Mark D. Levy, Alvin J. Joseph | 2021-12-07 |
| 11183514 | Vertically stacked field effect transistors | Steven M. Shank, Siva P. Adusumilli, Michel J. Abou-Khalil | 2021-11-23 |
| 11174160 | Planar cavity MEMS and related structures, methods of manufacture and design structures | John G. Twombly | 2021-11-16 |
| 11177158 | Integrated circuit structure with semiconductor-based isolation structure and methods to form same | Henry L. Aldridge, Jr., Johnatan A. Kantarovsky, Jeonghyun Hwang | 2021-11-16 |
| 11177345 | Heterojunction bipolar transistor | Henry L. Aldridge, Jr., Jeonghyun Hwang, Johnatan A. Kantarovsky | 2021-11-16 |
| 11167980 | Micro-electro-mechanical system (MEMS) structures and design structures | Michael T. Brigham, Christopher V. Jahnes, Cameron E. Luce, Jeffrey C. Maling, William J. Murphy +1 more | 2021-11-09 |
| 11164867 | Fin-type field-effect transistors over one or more buried polycrystalline layers | Siva P. Adusumilli, Julien Frougier, Ruilong Xie | 2021-11-02 |
| 11158535 | Multi-depth regions of high resistivity in a semiconductor substrate | Steven M. Shank, Siva P. Adusumilli, Ian McCallum-Cook, Michel J. Abou-Khalil | 2021-10-26 |
| 11158722 | Transistors with lattice structure | Vibhor Jain, Steven M. Shank, John J. Pekarik | 2021-10-26 |
| 11111139 | Planar cavity MEMS and related structures, methods of manufacture and design structures | Christopher V. Jahnes | 2021-09-07 |
| 11111138 | Planar cavity mems and related structures, methods of manufacture and design structures | John G. Twombly | 2021-09-07 |
| 11107884 | Sealed cavity structures with a planar surface | Siva P. Adusumilli, Laura J. Silverstein, Cameron E. Luce | 2021-08-31 |
| 11104572 | Planar cavity MEMS and related structures, methods of manufacture and design structures | Christopher V. Jahnes | 2021-08-31 |
| 11081561 | Field-effect transistors with vertically-serpentine gates | Steven M. Shank, Siva P. Adusumilli | 2021-08-03 |
| 11063140 | Complementary transistor structures formed with the assistance of doped-glass layers | John J. Pekarik, Vibhor Jain, Steven M. Shank, John J. Ellis-Monaghan, Herbert L. Ho +1 more | 2021-07-13 |
| 11021364 | Planar cavity MEMS and related structures, methods of manufacture and design structures | Russell T. Herrin, Jeffrey C. Maling | 2021-06-01 |
| 11004878 | Photodiodes integrated into a BiCMOS process | Vibhor Jain, Steven M. Shank, John J. Ellis-Monaghan, John J. Pekarik | 2021-05-11 |
| 10964796 | Heterojunction bipolar transistors with stress material for improved mobility | Vibhor Jain, Renata Camillo-Castillo | 2021-03-30 |
| 10941036 | Method of manufacturing MEMS switches with reduced switching voltage | Stephen E. Luce | 2021-03-09 |
| 10931274 | Temperature-sensitive bias circuit | Vibhor Jain | 2021-02-23 |
| 10923427 | SOI wafers with buried dielectric layers to prevent CU diffusion | Mukta G. Farooq, John A. Fitzsimmons | 2021-02-16 |
| 10916642 | Heterojunction bipolar transistor with emitter base junction oxide interface | Vibhor Jain, Steven M. Shank, John J. Pekarik | 2021-02-09 |
| 10910308 | Dual thickness fuse structures | John J. Pekarik, Vibhor Jain | 2021-02-02 |