Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12336285 | Field effect transistor with shallow trench isolation features within source/drain regions | Anthony K. Stamper, Siva P. Adusumilli, Steven M. Shank | 2025-06-17 |
| 12142686 | Field effect transistor | Anthony K. Stamper, Steven M. Shank, Mark D. Levy | 2024-11-12 |
| 12119352 | IC structure including porous semiconductor layer in bulk substrate adjacent trench isolation | Steven M. Shank, Anthony K. Stamper | 2024-10-15 |
| 12027582 | IC structure including porous semiconductor layer under trench isolation | Steven M. Shank, Anthony K. Stamper | 2024-07-02 |
| 11823948 | Bulk wafer switch isolation | Anthony K. Stamper, Steven M. Shank, Brett T. Cucci | 2023-11-21 |
| 11817479 | Transistor with air gap under raised source/drain region in bulk semiconductor substrate | Steven M. Shank, Anthony K. Stamper | 2023-11-14 |
| 11764225 | Field effect transistor with shallow trench isolation features within source/drain regions | Anthony K. Stamper, Siva P. Adusumilli, Steven M. Shank | 2023-09-19 |
| 11749717 | Transistor with embedded isolation layer in bulk substrate | Anthony K. Stamper, Johnatan A. Kantarovsky, Steven M. Shank, Siva P. Adusumilli | 2023-09-05 |
| 11677000 | IC structure including porous semiconductor layer under trench isolations adjacent source/drain regions | Steven M. Shank, Anthony K. Stamper | 2023-06-13 |
| 11605710 | Transistor with air gap under source/drain region in bulk semiconductor substrate | Anthony K. Stamper, Steven M. Shank, Srikanth Srihari | 2023-03-14 |
| 11488950 | Integrated circuit structure and method for bipolar transistor stack within substrate | Vibhor Jain, Anthony K. Stamper, Qizhi Liu, Siva P. Adusumilli | 2022-11-01 |
| 11380759 | Transistor with embedded isolation layer in bulk substrate | Anthony K. Stamper, Johnatan A. Kantarovsky, Steven M. Shank, Siva P. Adusumilli | 2022-07-05 |
| 11322387 | Bulk wafer switch isolation | Anthony K. Stamper, Steven M. Shank, Brett T. Cucci | 2022-05-03 |
| 9966735 | III-V lasers with integrated silicon photonic circuits | Cheng-Wei Cheng, Frank R. Libsch, Tak H. Ning, Kuen-Ting Shiu | 2018-05-08 |
| 9882021 | Planar III-V field effect transistor (FET) on dielectric layer | Cheng-Wei Cheng, Edward W. Kiewra, Amlan Majumdar, Devendra K. Sadana, Kuen-Ting Shiu +1 more | 2018-01-30 |
| 9679775 | Selective dopant junction for a group III-V semiconductor device | Kevin K. Chan, Marinus Hopstaken, Young-Hee Kim, Masaharu Kobayashi, Effendi Leobandung +3 more | 2017-06-13 |
| 9418846 | Selective dopant junction for a group III-V semiconductor device | Kevin K. Chan, Marinus Hopstaken, Young-Hee Kim, Masaharu Kobayashi, Effendi Leobandung +3 more | 2016-08-16 |
| 9407066 | III-V lasers with integrated silicon photonic circuits | Cheng-Wei Cheng, Frank R. Libsch, Tak H. Ning, Kuen-Ting Shiu | 2016-08-02 |
| 9287115 | Planar III-V field effect transistor (FET) on dielectric layer | Cheng-Wei Cheng, Edward W. Kiewra, Amlan Majumdar, Devendra K. Sadana, Kuen-Ting Shiu +1 more | 2016-03-15 |
| 9105571 | Interface engineering to optimize metal-III-V contacts | Christian Lavoie, Devendra K. Sadana, Kuen-Ting Shiu, Paul M. Solomon, Yanning Sun +1 more | 2015-08-11 |
| 8937299 | III-V finFETs on silicon substrate | Anirban Basu, Cheng-Wei Cheng, Amlan Majumdar, Ryan M. Martin, Devendra K. Sadana +2 more | 2015-01-20 |