| 10770388 |
Transistor with recessed cross couple for gate contact over active region integration |
Ruilong Xie, Veeraraghavan S. Basker, Kangguo Cheng, Jia Zeng, Youngtag Woo +1 more |
2020-09-08 |
$3,136,000 |
| 10566328 |
Integrated circuit products with gate structures positioned above elevated isolation structures |
Bala Haran, Christopher D. Sheraw |
2020-02-18 |
$50,792,000 |
| 10461186 |
Methods of forming vertical field effect transistors with self-aligned contacts and the resulting structures |
John H. Zhang, Ruilong Xie |
2019-10-29 |
$31,998,000 |
| 9812324 |
Methods to control fin tip placement |
Lei Zhuang, Lars Liebmann, Stuart A. Sieg, Fee Li Lie, Shreesh Narasimha +3 more |
2017-11-07 |
$8,746,000 |
| 9780002 |
Threshold voltage and well implantation method for semiconductor devices |
Xintuo Dai, Brian J. Greene, Daniel James Dechene, Daniel Jaeger |
2017-10-03 |
$10,070,000 |
| 8610217 |
Self-protected electrostatic discharge field effect transistor (SPESDFET), an integrated circuit incorporating the SPESDFET as an input/output (I/O) pad driver and associated methods of forming the SPESDFET and the integrated circuit |
Robert J. Gauthier, Jr., Junjun Li, Dustin K. Slisher |
2013-12-17 |
$6,242,000 |
| 8188574 |
Pedestal guard ring having continuous M1 metal barrier connected to crack stop |
Matthew S. Angyal, Effendi Leobandung, Jay William Strane |
2012-05-29 |
$10,419,000 |
| 8053838 |
Structures, fabrication methods, design structures for strained fin field effect transistors (FinFets) |
Xiaomeng Chen, Byeong Y. Kim, Huilong Zhu |
2011-11-08 |
$3,097,000 |
| 7943474 |
EDRAM including metal plates |
Thomas W. Dyer, Keith Kwong Hon Wong |
2011-05-17 |
$5,524,000 |
| 7911024 |
Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof |
Herbert L. Ho, Qiqing C. Ouyang, Paul A. Papworth, Christopher D. Sheraw, Michael D. Steigerwalt |
2011-03-22 |
$5,211,000 |
| 7790541 |
Method and structure for forming multiple self-aligned gate stacks for logic devices |
Bruce B. Doris, Werner Rausch, Robin Van Den Nieuwenhuizen |
2010-09-07 |
|
| 7790553 |
Methods for forming high performance gates and structures thereof |
Huilong Zhu, Xiaomeng Chen, Brian J. Greene, Bachir Dirahoui, Jay William Strane +1 more |
2010-09-07 |
$2,081,000 |
| 7763518 |
Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof |
Herbert L. Ho, Qiqing C. Ouyang, Paul A. Papworth, Christopher D. Sheraw, Michael D. Steigerwalt |
2010-07-27 |
$6,569,000 |
| 7691716 |
Vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness for low-substrate bias operation |
Herbert L. Ho, Qiging Ouyang, Paul A. Papworth, Christopher D. Sheraw, Michael D. Steigerwalt |
2010-04-06 |
$5,890,000 |
| 7659157 |
Dual metal gate finFETs with single or dual high-K gate dielectric |
Brian J. Greene |
2010-02-09 |
$5,437,000 |
| 7528027 |
Structure and method for manufacturing device with ultra thin SOI at the tip of a V-shape channel |
Huilong Zhu, Dan M. Mocuta, Ravikumar Ramachandran, Wenjuan Zhu |
2009-05-05 |
$6,523,000 |
| 7485537 |
Method of fabricating a vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness |
Herbert L. Ho, Qiqing C. Ouyang, Paul A. Papworth, Christopher D. Sheraw, Michael D. Steigerwalt |
2009-02-03 |
$3,057,000 |
| 7485510 |
Field effect device including inverted V shaped channel region and method for fabrication thereof |
Huilong Zhu, Ravikumar Ramachandran, Effendi Leobandung, Wenjuan Zhu, Christine Norris |
2009-02-03 |
$3,057,000 |
| 7394131 |
STI formation in semiconductor device including SOI and bulk silicon regions |
Michael D. Steigerwalt, Herbert L. Ho, David M. Dobuzinsky, Johnathan E. Faltermeier, Denise Pendleton |
2008-07-01 |
$7,630,000 |
| 7375410 |
Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof |
Herbert L. Ho, Qiqing C. Ouyang, Paul A. Papworth, Christopher D. Sheraw, Michael D. Steigerwalt |
2008-05-20 |
$8,483,000 |
| 7151023 |
Metal gate MOSFET by full semiconductor metal alloy conversion |
Hasan M. Nayfeh, Sunfei Fang, Jakub Kedzierski, Cyril Cabral, Jr. |
2006-12-19 |
$26,591,000 |
| 7118986 |
STI formation in semiconductor device including SOI and bulk silicon regions |
Michael D. Steigerwalt, Herbert L. Ho, David M. Dobuzinsky, Johnathan E. Faltermeier, Denise Pendleton |
2006-10-10 |
$5,276,000 |
| 7115965 |
Vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness for low-substrate bias operation |
Herbert L. Ho, Qiqing C. Ouyang, Paul A. Papworth, Christopher D. Sheraw, Michael D. Steigerwalt |
2006-10-03 |
$4,350,000 |
| 6995094 |
Method for deep trench etching through a buried insulator layer |
Herbert L. Ho, Brian W. Messenger, Michael D. Steigerwalt |
2006-02-07 |
$5,045,000 |
