Issued Patents All Time
Showing 51–75 of 118 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10796957 | Buried contact to provide reduced VFET feature-to-feature tolerance requirements | Jeffrey C. Shearer, Robert C. Wong, Ruilong Xie | 2020-10-06 |
| 10727317 | Bottom contact formation for vertical transistor devices | Ekmini Anuja De Silva, Sivananda K. Kanakasabapathy | 2020-07-28 |
| 10685876 | Liner and cap structures for reducing local interconnect vertical resistance without compromising reliability | Hemanth Jagannathan, Raghuveer R. Patlolla, Cornelius Brown Peethala | 2020-06-16 |
| 10658190 | Extreme ultraviolet lithography patterning with directional deposition | Yongan Xu, Ekmini Anuja De Silva, Yann Mignot | 2020-05-19 |
| 10622458 | Self-aligned contact for vertical field effect transistor | Brent A. Anderson, Steven R. Bentley, Balasubramanian Pranatharthiharan, Junli Wang, Ruilong Xie | 2020-04-14 |
| 10615027 | Stack viabar structures | Hsueh-Chung Chen, Yann Mignot, James J. Kelly, Terence B. Hook | 2020-04-07 |
| 10522654 | Gate tie-down enablement with inner spacer | Andre P. Labonte, Lars Liebmann, Sanjay C. Mehta | 2019-12-31 |
| 10497798 | Vertical field effect transistor with self-aligned contacts | Ruilong Xie, Steven Bentley, Puneet Harischandra Suvarna, Chanro Park, Min Gyu Sung +2 more | 2019-12-03 |
| 10490653 | Embedded bottom metal contact formed by a self-aligned contact process for vertical transistors | Zuoguang Liu, Heng Wu, Tenko Yamashita | 2019-11-26 |
| 10490667 | Three-dimensional field effect device | Huimei Zhou, Shogo Mochizuki, Peng Xu, Nicolas Loubet | 2019-11-26 |
| 10388602 | Local interconnect structure including non-eroded contact via trenches | Vimal Kamineni, Andre P. Labonte, Ruilong Xie | 2019-08-20 |
| 10332971 | Replacement metal gate stack for diffusion prevention | Takashi Ando, Johnathan E. Faltermeier, Sivananda K. Kanakasabapathy, Injo Ok, Tenko Yamashita | 2019-06-25 |
| 10332977 | Gate tie-down enablement with inner spacer | Andre P. Labonte, Lars Liebmann, Sanjay C. Mehta | 2019-06-25 |
| 10319835 | Embedded bottom metal contact formed by a self-aligned contact process for vertical transistors | Zuoguang Liu, Heng Wu, Tenko Yamashita | 2019-06-11 |
| 10312154 | Method of forming vertical FinFET device having self-aligned contacts | Ruilong Xie, Steven Bentley, Puneet Harischandra Suvarna, Chanro Park, Min Gyu Sung +2 more | 2019-06-04 |
| 10217664 | Reflow interconnect using Ru | Lawrence A. Clevenger, Huai Huang, Koichi Motoyama, Wei Wang, Chih-Chao Yang | 2019-02-26 |
| 10211101 | Reflow interconnect using Ru | Lawrence A. Clevenger, Huai Huang, Koichi Motoyama, Wei Wang, Chih-Chao Yang | 2019-02-19 |
| 10186599 | Forming self-aligned contact with spacer first | Andrew M. Greene, Sean Lian, Balasubramanian Pranatharthiharan, Mark V. Raymond, Ruilong Xie | 2019-01-22 |
| 10128352 | Gate tie-down enablement with inner spacer | Andre P. Labonte, Lars Liebmann, Sanjay C. Mehta | 2018-11-13 |
| 10020381 | Embedded bottom metal contact formed by a self-aligned contact process for vertical transistors | Zuoguang Liu, Heng Wu, Tenko Yamashita | 2018-07-10 |
| 9985027 | Stable multiple threshold voltage devices on replacement metal gate CMOS devices | Sivananda K. Kanakasabapathy, Injo Ok, Tenko Yamashita | 2018-05-29 |
| 9960078 | Reflow interconnect using Ru | Lawrence A. Clevenger, Huai Huang, Koichi Motoyama, Wei Wang, Chih-Chao Yang | 2018-05-01 |
| 9953978 | Replacement gate structures for transistor devices | Ruilong Xie, Kisik Choi, Shom Ponoth | 2018-04-24 |
| 9941163 | Gate tie-down enablement with inner spacer | Andre P. Labonte, Lars Liebmann, Sanjay C. Mehta | 2018-04-10 |
| 9929049 | Gate tie-down enablement with inner spacer | Andre P. Labonte, Lars Liebmann, Sanjay C. Mehta | 2018-03-27 |