YM

Yann Mignot

SS Stmicroelectronics Sa: 16 patents #70 of 1,676Top 5%
Globalfoundries: 4 patents #817 of 4,424Top 20%
TL Tokyo Electron Limited: 3 patents #2,069 of 5,567Top 40%
Lam Research: 1 patents #1,364 of 2,128Top 65%
Overall (All Time): #9,846 of 4,157,543Top 1%
120
Patents All Time

Issued Patents All Time

Showing 25 most recent of 120 patents

Patent #TitleCo-InventorsDate
12400859 Metal hard mask for precise tuning of mandrels Joe Lee, Christopher J. Penny, Koichi Motoyama 2025-08-26
12369494 MRAM top electrode structure with liner layer Hsueh-Chung Chen, Koichi Motoyama, Chanro Park, Chih-Chao Yang 2025-07-22
12272545 Embedded metal contamination removal from BEOL wafers Devika Sil, Ashim Dutta, John C. Arnold, Daniel C. Edelstein, Kedari Matam +1 more 2025-04-08
12243770 Hard mask removal without damaging top epitaxial layer Chanro Park, Daniel J. Vincent, Su Chen Fan, Christopher J. Waskiewicz, Hsueh-Chung Chen 2025-03-04
12237175 Polymerization protective liner for reactive ion etch in patterning Bhaskar Nagabhirava, Phillip Friddle, Michael Goss, Dominik Metzler 2025-02-25
12207477 Same level MRAM stacks having different configurations Oscar van der Straten, Dimitri Houssameddine 2025-01-21
12191388 Area scaling for VTFET contacts Su Chen Fan, Jing Guo, Lijuan Zou 2025-01-07
12148617 Structure and method to pattern pitch lines Chanro Park, Chi-Chun Liu, Stuart A. Sieg, Koichi Motoyama, Hsueh-Chung Chen 2024-11-19
12142562 Subtractive metal etch with improved isolation for BEOL interconnect and cross point Chanro Park, Hsueh-Chung Chen 2024-11-12
12142556 X-ray shielding structure for a chip Hsueh-Chung Chen, Mary Claire Silvestre, Effendi Leobandung 2024-11-12
12113013 Dual color via patterning Hsueh-Chung Chen, Su Chen Fan, Mary Claire Silvestre, Chi-Chun Liu, Junli Wang 2024-10-08
12094774 Back-end-of-line single damascene top via spacer defined by pillar mandrels Yongan Xu, Hsueh-Chung Chen 2024-09-17
12033856 Litho-litho-etch (LLE) multi color resist Ekmini Anuja De Silva, Dario L. Goldfarb 2024-07-09
12010930 Wrap-around projection liner for AI device Injo Ok, Hsueh-Chung Chen, Mary Claire Silvestre 2024-06-11
11916013 Via interconnects including super vias Christopher J. Waskiewicz, Eric R. Miller, Chanro Park 2024-02-27
11901440 Sacrificial fin for self-aligned contact rail formation Christopher J. Waskiewicz, Su Chen Fan, Brent A. Anderson, Junli Wang 2024-02-13
11849647 Nonmetallic liner around a magnetic tunnel junction Tao Li, Ashim Dutta, Tsung-Sheng Kang, Wenyu Xu 2023-12-19
11817389 Multi-metal interconnects for semiconductor device structures Hsueh-Chung Chen, Chih-Chao Yang, Shanti Pancharatnam 2023-11-14
11804401 Spacer-defined process for lithography-etch double patterning for interconnects Nelson Felix, Ekmini Anuja De Silva, Luciana Meli Thompson 2023-10-31
11798842 Line formation with cut-first tip definition Chanro Park, Koichi Motoyama, Hsueh-Chung Chen 2023-10-24
11784120 Metal via structure James J. Kelly, Muthumanickam Sankarapandian, Yongan Xu, Hsueh-Chung Chen, Daniel J. Vincent 2023-10-10
11688632 Semiconductor device with linerless contacts Alex Joseph Varghese, Marc A. Bergendahl, Andrew M. Greene, Dallas Lea, Matthew T. Shoudy +2 more 2023-06-27
11670580 Subtractive via etch for MIMCAP Hsueh-Chung Chen, Junli Wang, Mary Claire Silvestre, Chi-Chun Liu 2023-06-06
11646358 Sacrificial fin for contact self-alignment Indira Seshadri, Su Chen Fan, Christopher J. Waskiewicz, Eric R. Miller 2023-05-09
11600325 Non volatile resistive memory logic device Hsueh-Chung Chen, Mary Claire Silvestre, Soon-Cheon Seo, Chi-Chun Liu, Fee Li Lie +2 more 2023-03-07