Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12277960 | Modified top electrode contact for MRAM embedding in advanced logic nodes | Ashim Dutta, Oscar van der Straten, Theodorus E. Standaert | 2025-04-15 |
| 12261044 | Multi-layer hardmask for defect reduction in EUV patterning | Bhaskar Nagabhirava, Phillip Friddle, Ekimini Anuja De Silva, Jennifer Church, Nelson Felix | 2025-03-25 |
| 12243771 | Selective patterning of vias with hardmasks | John C. Arnold, Ashim Dutta, Timothy Mathew Philip, Sagarika Mukesh | 2025-03-04 |
| 12237175 | Polymerization protective liner for reactive ion etch in patterning | Bhaskar Nagabhirava, Phillip Friddle, Michael Goss, Yann Mignot | 2025-02-25 |
| 12020949 | Subtractive patterning of interconnect structures | Somnath Ghosh, John C. Arnold, Ekmini Anuja De Silva | 2024-06-25 |
| 11923246 | Via CD controllable top via structure | Koichi Motoyama, Ekmini Anuja De Silva, Chanro Park, Hsueh-Chung Chen | 2024-03-05 |
| 11830807 | Placing top vias at line ends by selective growth of via mask from line cut dielectric | Ashim Dutta, Ekmini Anuja De Silva, John C. Arnold | 2023-11-28 |
| 11812668 | Pillar-based memory hardmask smoothing and stress reduction | Michael Rizzolo, Theodorus E. Standaert, Ashim Dutta | 2023-11-07 |
| 11688636 | Spin on scaffold film for forming topvia | Somnath Ghosh, Karen E. Petrillo, Cody J. Murray, Ekmini Anuja De Silva, Chi-Chun Liu +1 more | 2023-06-27 |
| 11404317 | Method for fabricating a semiconductor device including self-aligned top via formation at line ends | John C. Arnold, Ashim Dutta, Ekmini Anuja De Silva | 2022-08-02 |
| 11276607 | Selective patterning of vias with hardmasks | John C. Arnold, Ashim Dutta, Timothy Mathew Philip, Sagarika Mukesh | 2022-03-15 |
| 11244907 | Metal surface preparation for increased alignment contrast | Tianji Zhou, Saumya Sharma, Chih-Chao Yang, Theodorus E. Standaert | 2022-02-08 |
| 11227892 | MRAM integration with BEOL interconnect including top via | Ashim Dutta, Chih-Chao Yang, Ekmini Anuja De Silva | 2022-01-18 |
| 11223008 | Pillar-based memory hardmask smoothing and stress reduction | Michael Rizzolo, Theodorus E. Standaert, Ashim Dutta | 2022-01-11 |
| 11205678 | Embedded MRAM device with top via | Ashim Dutta, Ekmini Anuja De Silva | 2021-12-21 |
| 11189783 | Embedded MRAM device formation with self-aligned dielectric cap | John C. Arnold, Ashim Dutta, Donald F. Canaperi | 2021-11-30 |
| 11189561 | Placing top vias at line ends by selective growth of via mask from line cut dielectric | Ashim Dutta, Ekmini Anuja De Silva, John C. Arnold | 2021-11-30 |
| 11189527 | Self-aligned top vias over metal lines formed by a damascene process | Timothy Mathew Philip, Sagarika Mukesh, Ashim Dutta, John C. Arnold | 2021-11-30 |
| 11152261 | Self-aligned top via formation at line ends | Ashim Dutta, John C. Arnold | 2021-10-19 |
| 11133260 | Self-aligned top via | Chi-Chun Liu, John C. Arnold, Nelson Felix, Ashim Dutta | 2021-09-28 |
| 11094590 | Structurally stable self-aligned subtractive vias | Sagarika Mukesh, Chanro Park, Timothy Mathew Philip | 2021-08-17 |
| 10879190 | Patterning integration scheme with trench alignment marks | Chih-Chao Yang, Hao Tang, Cornelius Brown Peethala | 2020-12-29 |
| 10685879 | Lithographic alignment of a conductive line to a via | John C. Arnold, Ashim Dutta, Takeshi Nogami | 2020-06-16 |
| 10534276 | Lithographic photomask alignment using non-planar alignment structures formed on wafer | Chih-Chao Yang, Hao Tang, Cornelius Brown Peethala | 2020-01-14 |
| 9620382 | Reactor for plasma-based atomic layer etching of materials | Gottlieb S. Oehrlein | 2017-04-11 |