Issued Patents All Time
Showing 76–100 of 118 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9905665 | Replacement metal gate stack for diffusion prevention | Takashi Ando, Johnathan E. Faltermeier, Sivananda K. Kanakasabapathy, Injo Ok, Tenko Yamashita | 2018-02-27 |
| 9899259 | Gate tie-down enablement with inner spacer | Andre P. Labonte, Lars Liebmann, Sanjay C. Mehta | 2018-02-20 |
| 9881842 | Wimpy and nominal semiconductor device structures for vertical finFETs | Kisup Chung, Catherine B. Labelle, Xin Miao | 2018-01-30 |
| 9786607 | Interconnect structure including middle of line (MOL) metal layer local interconnect on ETCH stop layer | Sukwon Hong, William J. Taylor, Jr. | 2017-10-10 |
| 9735054 | Gate tie-down enablement with inner spacer | Andre P. Labonte, Lars Liebmann, Sanjay C. Mehta | 2017-08-15 |
| 9728462 | Stable multiple threshold voltage devices on replacement metal gate CMOS devices | Sivananda K. Kanakasabapathy, Injo Ok, Tenko Yamashita | 2017-08-08 |
| 9728456 | Interconnect structure including middle of line (MOL) metal layer local interconnect on etch stop layer | Sukwon Hong, William J. Taylor, Jr. | 2017-08-08 |
| 9653571 | Freestanding spacer having sub-lithographic lateral dimension and method of forming same | Hsueh-Chung Chen, Dong-Kwon Kim, Sean Lian, Fee Li Lie, Linus Jang | 2017-05-16 |
| 9627257 | Gate tie-down enablement with inner spacer | Andre P. Labonte, Lars Liebmann, Sanjay C. Mehta | 2017-04-18 |
| 9583442 | Interconnect structure including middle of line (MOL) metal layer local interconnect on etch stop layer | Sukwon Hong, William J. Taylor, Jr. | 2017-02-28 |
| 9576901 | Contact area structure and method for manufacturing the same | Hsueh-Chung Chen, Chih-Chao Yang | 2017-02-21 |
| 9570573 | Self-aligned gate tie-down contacts with selective etch stop liner | Lars Liebmann, Ruilong Xie | 2017-02-14 |
| 9570397 | Local interconnect structure including non-eroded contact via trenches | Vimal Kamineni, Andre P. Labonte, Ruilong Xie | 2017-02-14 |
| 9536791 | Stable multiple threshold voltage devices on replacement metal gate CMOS devices | Sivananda K. Kanakasabapathy, Injo Ok, Tenko Yamashita | 2017-01-03 |
| 9466680 | Integrated multiple gate length semiconductor device including self-aligned contacts | Balasubramanian Pranatharthiharan, Rajasekhar Venigalla | 2016-10-11 |
| 9459714 | Electronic device with multiple display modes and display method of the same | Quan Niu, Guang Yang, Ke Shang | 2016-10-04 |
| 9455254 | Methods of forming a combined gate and source/drain contact structure and the resulting device | Ruilong Xie, Andre P. Labonte, Balasubramanian S. Pranatharthi Haran | 2016-09-27 |
| 9397049 | Gate tie-down enablement with inner spacer | Andre P. Labonte, Lars Liebmann, Sanjay C. Mehta | 2016-07-19 |
| 9385123 | STI region for small fin pitch in FinFET devices | Hsueh-Chung Chen, Chiahsun Tseng, Chun-Chen Yeh | 2016-07-05 |
| 9312136 | Replacement metal gate stack for diffusion prevention | Takashi Ando, Johnathan E. Faltermeier, Sivananda K. Kanakasabapathy, Injo Ok, Tenko Yamashita | 2016-04-12 |
| 9293551 | Integrated multiple gate length semiconductor device including self-aligned contacts | Balasubramanian Pranatharthiharan, Rajasekhar Venigalla | 2016-03-22 |
| 9287130 | Method for single fin cuts using selective ion implants | Xiuyu Cai, Ajey Poovannummoottil Jacob, Ruilong Xie, Bruce B. Doris, Kangguo Cheng +7 more | 2016-03-15 |
| 9257348 | Methods of forming replacement gate structures for transistors and the resulting devices | Ruilong Xie, Kisik Choi, Shom Ponoth | 2016-02-09 |
| 9130029 | Recessing and capping of gate structures with varying metal compositions | Ruilong Xie, David V. Horak, Pranatharthiharan Haran Balasubramanian | 2015-09-08 |
| 9024389 | Borderless contact for ultra-thin body devices | Balasubramanian S. Haran, David V. Horak | 2015-05-05 |