Issued Patents All Time
Showing 1–25 of 82 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12354658 | Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells | Jordan D. Greenlee, Tom George | 2025-07-08 |
| 12340846 | Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells | Nancy M. Lomeli | 2025-06-24 |
| 12074165 | Gate cut with integrated etch stop layer | Marc A. Bergendahl, Andrew M. Greene | 2024-08-27 |
| 11961556 | Socket design for a memory device | Amitava Majumdar, Radhakrishna Kotti | 2024-04-16 |
| 11882774 | Low resistance crosspoint architecture | Patrick M. Flynn, Josiah Jebaraj Johnley Muthuraj, Efe Sinan Ege, Kevin Lee Baker, Tao Nguyen +1 more | 2024-01-23 |
| 11776957 | Gate cut with integrated etch stop layer | Marc A. Bergendahl, Andrew M. Greene | 2023-10-03 |
| 11778837 | Memory with optimized resistive layers | Lei Wei, Pengyuan Zheng, Kevin Lee Baker, Efe Sinan Ege, Adam Thomas Barton | 2023-10-03 |
| 11552077 | Gate cut with integrated etch stop layer | Marc A. Bergendahl, Andrew M. Greene | 2023-01-10 |
| 11380732 | Memory with optimized resistive layers | Lei Wei, Pengyuan Zheng, Kevin Lee Baker, Efe Sinan Ege, Adam Thomas Barton | 2022-07-05 |
| 11342446 | Nanosheet field effect transistors with partial inside spacers | Michael A. Guillorn, Terence B. Hook, Robert R. Robison, Reinaldo Vega | 2022-05-24 |
| 11276767 | Additive core subtractive liner for metal cut etch processes | Ruqiang Bao, Kisup Chung, Andrew M. Greene, Sivananda K. Kanakasabapathy, David L. Rath +1 more | 2022-03-15 |
| 11222695 | Socket design for a memory device | Amitava Majumdar, Radhakrishna Kotti | 2022-01-11 |
| 11152489 | Additive core subtractive liner for metal cut etch processes | Ruqiang Bao, Kisup Chung, Andrew M. Greene, Sivananda K. Kanakasabapathy, David L. Rath +1 more | 2021-10-19 |
| 11121317 | Low resistance crosspoint architecture | Patrick M. Flynn, Josiah Jebaraj Johnley Muthuraj, Efe Sinan Ege, Kevin Lee Baker, Tao Nguyen +1 more | 2021-09-14 |
| 11075281 | Additive core subtractive liner for metal cut etch processes | Ruqiang Bao, Kisup Chung, Andrew M. Greene, Sivananda K. Kanakasabapathy, David L. Rath +1 more | 2021-07-27 |
| 11056391 | Subtractive vFET process flow with replacement metal gate and metallic source/drain | Hari V. Mallela, Robert R. Robison, Reinaldo Vega | 2021-07-06 |
| 11024709 | Vertical fin field effect transistor with air gap spacers | Hari V. Mallela, Robert R. Robison, Reinaldo Vega | 2021-06-01 |
| 10998314 | Gate cut with integrated etch stop layer | Marc A. Bergendahl, Andrew M. Greene | 2021-05-04 |
| 10957603 | Vertical FET devices with multiple channel lengths | Hari V. Mallela, Reinaldo Vega | 2021-03-23 |
| 10840247 | Orientation engineering in complementary metal oxide semiconductor fin field effect transistor integration for increased mobility and sharper junction | Chia-Yu Chen, Bruce B. Doris, Hong He | 2020-11-17 |
| 10832971 | Fabricating tapered semiconductor devices | Ravikumar Ramachandran, Albert M. Chu, Alan C. Thomas, Kafai Lai | 2020-11-10 |
| 10777557 | Orientation engineering in complementary metal oxide semiconductor fin field effect transistor integration for increased mobility and sharper junction | Chia-Yu Chen, Bruce B. Doris, Hong He | 2020-09-15 |
| 10734385 | Orientation engineering in complementary metal oxide semiconductor fin field effect transistor integration for increased mobility and sharper junction | Chia-Yu Chen, Bruce B. Doris, Hong He | 2020-08-04 |
| 10727316 | Vertical transistor fabrication and devices | Brent A. Anderson, Bruce B. Doris, Seong-Dong Kim | 2020-07-28 |
| 10665589 | Gate cut with integrated etch stop layer | Marc A. Bergendahl, Andrew M. Greene | 2020-05-26 |