Issued Patents All Time
Showing 51–75 of 82 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10109535 | Method of fabricating vertical field effect transistors with protective fin liner during bottom spacer recess ETCH | Hari V. Mallela, Reinaldo Vega | 2018-10-23 |
| 10096607 | Three-dimensional stacked junctionless channels for dense SRAM | Michael A. Guillorn, Robert R. Robison, Reinaldo Vega | 2018-10-09 |
| 10083961 | Gate cut with integrated etch stop layer | Marc A. Bergendahl, Andrew M. Greene | 2018-09-25 |
| 10068991 | Patterned sidewall smoothing using a pre-smoothed inverted tone pattern | Kafai Lai, Hari V. Mallela, Hiroyuki Miyazoe, Reinaldo Vega | 2018-09-04 |
| 9985115 | Vertical transistor fabrication and devices | Brent A. Anderson, Bruce B. Doris, Seong-Dong Kim | 2018-05-29 |
| 9978750 | Low resistance source/drain contacts for complementary metal oxide semiconductor (CMOS) devices | Praneet Adusumilli, Oleg Gluschenkov, Dechao Guo, Zuoguang Liu, Tenko Yamashita | 2018-05-22 |
| 9941411 | Vertical transistor fabrication and devices | Brent A. Anderson, Bruce B. Doris, Seong-Dong Kim | 2018-04-10 |
| 9929058 | Vertical FETS with variable bottom spacer recess | Hari V. Mallela, Reinaldo Vega | 2018-03-27 |
| 9911804 | Vertical fin field effect transistor with air gap spacers | Hari V. Mallela, Robert R. Robison, Reinaldo Vega | 2018-03-06 |
| 9859421 | Vertical field effect transistor with subway etch replacement metal gate | Robert R. Robison, Reinaldo Vega | 2018-01-02 |
| 9859384 | Vertical field effect transistors with metallic source/drain regions | Hari V. Mallela, Robert R. Robison, Reinaldo Vega | 2018-01-02 |
| 9793374 | Vertical transistor fabrication and devices | Brent A. Anderson, Bruce B. Doris, Seong-Dong Kim | 2017-10-17 |
| 9761727 | Vertical FETs with variable bottom spacer recess | Hari V. Mallela, Reinaldo Vega | 2017-09-12 |
| 9728466 | Vertical field effect transistors with metallic source/drain regions | Hari V. Mallela, Robert R. Robison, Reinaldo Vega | 2017-08-08 |
| 9728640 | Hybrid substrate engineering in CMOS finFET integration for mobility improvement | Chia-Yu Chen, Bruce B. Doris, Hong He | 2017-08-08 |
| 9721848 | Cutting fins and gates in CMOS devices | Huiming Bu, Kangguo Cheng, Andrew M. Greene, Dechao Guo, Sivananda K. Kanakasabapathy +6 more | 2017-08-01 |
| 9698224 | Silicon germanium fin formation via condensation | Bruce B. Doris | 2017-07-04 |
| 9601491 | Vertical field effect transistors having epitaxial fin channel with spacers below gate structure | Hari V. Mallela, Reinaldo Vega | 2017-03-21 |
| 9601390 | Silicon germanium fin formation via condensation | Bruce B. Doris | 2017-03-21 |
| 9530700 | Method of fabricating vertical field effect transistors with protective fin liner during bottom spacer recess etch | Hari V. Mallela, Reinaldo Vega | 2016-12-27 |
| 9466680 | Integrated multiple gate length semiconductor device including self-aligned contacts | Su Chen Fan, Balasubramanian Pranatharthiharan | 2016-10-11 |
| 9437503 | Vertical FETs with variable bottom spacer recess | Hari V. Mallela, Reinaldo Vega | 2016-09-06 |
| 9431305 | Vertical transistor fabrication and devices | Brent A. Anderson, Bruce B. Doris, Seong-Dong Kim | 2016-08-30 |
| 9373524 | Die level chemical mechanical polishing | Rishikesh Krishnan | 2016-06-21 |
| 9293551 | Integrated multiple gate length semiconductor device including self-aligned contacts | Su Chen Fan, Balasubramanian Pranatharthiharan | 2016-03-22 |