Issued Patents All Time
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11481611 | RRAM crossbar array structure for multi-task learning | Takashi Ando, Reinaldo Vega | 2022-10-25 |
| 11056391 | Subtractive vFET process flow with replacement metal gate and metallic source/drain | Robert R. Robison, Reinaldo Vega, Rajasekhar Venigalla | 2021-07-06 |
| 11024709 | Vertical fin field effect transistor with air gap spacers | Robert R. Robison, Reinaldo Vega, Rajasekhar Venigalla | 2021-06-01 |
| 10957603 | Vertical FET devices with multiple channel lengths | Reinaldo Vega, Rajasekhar Venigalla | 2021-03-23 |
| 10833048 | Nanowire enabled substrate bonding and electrical contact formation | Li-Wen Hung, Reinaldo Vega | 2020-11-10 |
| 10811413 | Multi-threshold vertical FETs with common gates | Takashi Ando, Reinaldo Vega, Choonghyun Lee, Li-Wen Hung | 2020-10-20 |
| 10770512 | Stacked resistive random access memory with integrated access transistor and high density layout | Reinaldo Vega, Takashi Ando, Li-Wen Hung | 2020-09-08 |
| 10644104 | Vertical fin field effect transistor with air gap spacers | Robert R. Robison, Reinaldo Vega, Rajasekhar Venigalla | 2020-05-05 |
| 10424515 | Vertical FET devices with multiple channel lengths | Reinaldo Vega, Rajasekhar Venigalla | 2019-09-24 |
| 10381463 | Patterned sidewall smoothing using a pre-smoothed inverted tone pattern | Kafai Lai, Hiroyuki Miyazoe, Reinaldo Vega, Rajasekhar Venigalla | 2019-08-13 |
| 10283416 | Vertical FETS with variable bottom spacer recess | Reinaldo Vega, Rajasekhar Venigalla | 2019-05-07 |
| 10243041 | Vertical fin field effect transistor with air gap spacers | Robert R. Robison, Reinaldo Vega, Rajasekhar Venigalla | 2019-03-26 |
| 10170543 | Vertical fin field effect transistor with air gap spacers | Robert R. Robison, Reinaldo Vega, Rajasekhar Venigalla | 2019-01-01 |
| 10164119 | Vertical field effect transistors with protective fin liner during bottom spacer recess etch | Reinaldo Vega, Rajasekhar Venigalla | 2018-12-25 |
| 10109535 | Method of fabricating vertical field effect transistors with protective fin liner during bottom spacer recess ETCH | Reinaldo Vega, Rajasekhar Venigalla | 2018-10-23 |
| 10068991 | Patterned sidewall smoothing using a pre-smoothed inverted tone pattern | Kafai Lai, Hiroyuki Miyazoe, Reinaldo Vega, Rajasekhar Venigalla | 2018-09-04 |
| 9929058 | Vertical FETS with variable bottom spacer recess | Reinaldo Vega, Rajasekhar Venigalla | 2018-03-27 |
| 9911804 | Vertical fin field effect transistor with air gap spacers | Robert R. Robison, Reinaldo Vega, Rajasekhar Venigalla | 2018-03-06 |
| 9859384 | Vertical field effect transistors with metallic source/drain regions | Robert R. Robison, Reinaldo Vega, Rajasekhar Venigalla | 2018-01-02 |
| 9761727 | Vertical FETs with variable bottom spacer recess | Reinaldo Vega, Rajasekhar Venigalla | 2017-09-12 |
| 9728466 | Vertical field effect transistors with metallic source/drain regions | Robert R. Robison, Reinaldo Vega, Rajasekhar Venigalla | 2017-08-08 |
| 9601491 | Vertical field effect transistors having epitaxial fin channel with spacers below gate structure | Reinaldo Vega, Rajasekhar Venigalla | 2017-03-21 |
| 9530700 | Method of fabricating vertical field effect transistors with protective fin liner during bottom spacer recess etch | Reinaldo Vega, Rajasekhar Venigalla | 2016-12-27 |
| 9514992 | Unidirectional spacer in trench silicide | Emre Alptekin, Sameer H. Jain, Unoh Kwon, Zhengwen Li, Ayse M. Ozbek +3 more | 2016-12-06 |
| 9437503 | Vertical FETs with variable bottom spacer recess | Reinaldo Vega, Rajasekhar Venigalla | 2016-09-06 |