Issued Patents All Time
Showing 25 most recent of 401 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12408369 | Vertical transport field effect transistors having different threshold voltages along the channel | Takashi Ando, Alexander Reznicek, Jingyun Zhang | 2025-09-02 |
| 12408431 | Gate stack quality for gate-all-around field-effect transistors | Jingyun Zhang, Takashi Ando | 2025-09-02 |
| 12396225 | Method to release nano sheet after nano sheet fin recess | Chanro Park, Kangguo Cheng, Ruilong Xie, Juntao Li | 2025-08-19 |
| 12255106 | Multi-Vt nanosheet devices | Jingyun Zhang, Takashi Ando, Alexander Reznicek | 2025-03-18 |
| 12230676 | Nanosheet device with tri-layer bottom dielectric isolation | Xin Miao, Jingyun Zhang, Alexander Reznicek | 2025-02-18 |
| 12183826 | Vertical field effect transistor with low-resistance bottom source-drain contact | Soon-Cheon Seo, Injo Ok, Alexander Reznicek | 2024-12-31 |
| 12156395 | Metal gate patterning for logic and SRAM in nanosheet devices | Takashi Ando, Jingyun Zhang, Alexander Reznicek | 2024-11-26 |
| 12136671 | Gate-all-around field-effect transistor having source side lateral end portion smaller than a thickness of channel portion and drain side lateral end portion | Jingyun Zhang, Takashi Ando, Pouya Hashemi, Alexander Reznicek | 2024-11-05 |
| 12132098 | Uniform interfacial layer on vertical fin sidewalls of vertical transport field-effect transistors | Shogo Mochizuki, Kangguo Cheng, Juntao Li | 2024-10-29 |
| 12094949 | Fin-type field effect transistor having a wrap-around gate with bottom isolation and inner spacers to reduce parasitic capacitance | Chanro Park, Ruilong Xie, Kangguo Cheng | 2024-09-17 |
| 12046466 | Method and apparatus for treating substrate | Yong Jun SEO, Hyun YOON, Jungsuk Goh, Byeong Geun Kim, Yoonki SA +6 more | 2024-07-23 |
| 12027459 | Integrated circuit device and method of manufacturing the same | Joonyong Choe, Youngju Lee | 2024-07-02 |
| 12009422 | Self aligned top contact for vertical transistor | Christopher J. Waskiewicz, Chanro Park, Alexander Reznicek | 2024-06-11 |
| 12009395 | Self-aligned block for vertical FETs | Ruilong Xie, Junli Wang, Alexander Reznicek | 2024-06-11 |
| 11996480 | Vertical transistor with late source/drain epitaxy | Kangguo Cheng, Juntao Li, Shogo Mochizuki | 2024-05-28 |
| 11990530 | Replacement-channel fabrication of III-V nanosheet devices | Jingyun Zhang, Chun Wing Yeung, Robin Hsin Kuo Chao, Heng Wu | 2024-05-21 |
| 11978783 | Vertical fin field effect transistor devices with reduced top source/drain variability and lower resistance | Kangguo Cheng, Shogo Mochizuki, Juntao Li | 2024-05-07 |
| 11949011 | Vertical transistor with gate encapsulation layers | Chen Zhang | 2024-04-02 |
| 11937521 | Structure and method to fabricate resistive memory with vertical pre-determined filament | Chanro Park, Kangguo Cheng, Ruilong Xie | 2024-03-19 |
| 11923438 | Field-effect transistor with punchthrough stop region | Kangguo Cheng, Shogo Mochizuki, Juntao Li | 2024-03-05 |
| 11881505 | Tri-layer STI liner for nanosheet leakage control | Xin Miao, Alexander Reznicek, Jingyun Zhang | 2024-01-23 |
| 11842998 | Semiconductor device and method of forming the semiconductor device | Robin Hsin Kuo Chao, Hemanth Jagannathan, Chun Wing Yeung, Jingyun Zhang | 2023-12-12 |
| 11830877 | Co-integrated channel and gate formation scheme for nanosheet transistors having separately tuned threshold voltages | Takashi Ando, Jingyun Zhang, Pouya Hashemi, Alexander Reznicek | 2023-11-28 |
| 11784096 | Vertical transport field-effect transistors having germanium channel surfaces | Pouya Hashemi, Takashi Ando | 2023-10-10 |
| 11784122 | Integrated circuit device and method of manufacturing the same | Joonyong Choe, Youngju Lee | 2023-10-10 |