Issued Patents All Time
Showing 25 most recent of 581 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12402342 | Nanosheet device with T-shaped dual inner spacer | Alexander Reznicek, Takashi Ando, Ruilong Xie | 2025-08-26 |
| 12394462 | Stacked FET with three-terminal SOT MRAM | Ruilong Xie | 2025-08-19 |
| 12361995 | Spin-orbit-torque (SOT) MRAM with doubled layer of SOT metal | Christopher Safranski | 2025-07-15 |
| 12225835 | Resistive switching device having a protective electrode ring | Takashi Ando, Ruilong Xie, Alexander Reznicek | 2025-02-11 |
| 12191352 | Using different work-functions to reduce gate-induced drain leakage current in stacked nanosheet transistors | Takashi Ando, Ruilong Xie, Alexander Reznicek | 2025-01-07 |
| 12136671 | Gate-all-around field-effect transistor having source side lateral end portion smaller than a thickness of channel portion and drain side lateral end portion | Jingyun Zhang, Choonghyun Lee, Takashi Ando, Alexander Reznicek | 2024-11-05 |
| 12063867 | Dual spacer for double magnetic tunnel junction devices | Chandrasekharan Kothandaraman, Nathan P. Marchack | 2024-08-13 |
| 12020736 | Spin-orbit-torque magnetoresistive random-access memory array | Daniel C. Worledge, John K. DeBrosse | 2024-06-25 |
| 11980039 | Wide-base magnetic tunnel junction device with sidewall polymer spacer | Nathan P. Marchack, Chandrasekharan Kothandaraman | 2024-05-07 |
| RE49954 | Fabrication of nano-sheet transistors with different threshold voltages | Karthik Balakrishnan, Kangguo Cheng, Alexander Reznicek | 2024-04-30 |
| 11972785 | MRAM structure with enhanced magnetics using seed engineering | Jonathan Zanhong Sun, Guohan Hu, Saba Zare | 2024-04-30 |
| 11937512 | Magnetic tunnel junction device with air gap | Chandrasekharan Kothandaraman, Nathan P. Marchack | 2024-03-19 |
| 11915734 | Spin-orbit-torque magnetoresistive random-access memory with integrated diode | Takashi Ando, Alexander Reznicek | 2024-02-27 |
| 11855148 | Vertical field effect transistor with dual threshold voltage | Takashi Ando, Ruilong Xie, Alexander Reznicek | 2023-12-26 |
| 11844284 | On-chip integration of a high-efficiency and a high-retention inverted wide-base double magnetic tunnel junction device | Chandrasekharan Kothandaraman | 2023-12-12 |
| 11830877 | Co-integrated channel and gate formation scheme for nanosheet transistors having separately tuned threshold voltages | Takashi Ando, Jingyun Zhang, Choonghyun Lee, Alexander Reznicek | 2023-11-28 |
| 11784096 | Vertical transport field-effect transistors having germanium channel surfaces | Choonghyun Lee, Takashi Ando | 2023-10-10 |
| 11778921 | Double magnetic tunnel junction device | Bruce B. Doris, Chandrasekharan Kothandaraman, Jonathan Zanhong Sun | 2023-10-03 |
| 11756996 | Formation of wrap-around-contact for gate-all-around nanosheet FET | Takashi Ando, Choonghyun Lee, Alexander Reznicek, Jingyun Zhang | 2023-09-12 |
| 11742425 | FinFET device with partial interface dipole formation for reduction of gate induced drain leakage | Takashi Ando, Alexander Reznicek, Ruilong Xie | 2023-08-29 |
| 11737289 | High density ReRAM integration with interconnect | Takashi Ando, Alexander Reznicek, Ruilong Xie | 2023-08-22 |
| 11697889 | Three-dimensionally stretchable single crystalline semiconductor membrane | Alexander Reznicek, Karthik Balakrishnan, Stephen W. Bedell, Bahman Hekmatshoartabari, Keith E. Fogel | 2023-07-11 |
| 11646362 | Vertical transport field-effect transistor structure having increased effective width and self-aligned anchor for source/drain region formation | Ruilong Xie, Alexander Reznicek, Takashi Ando | 2023-05-09 |
| 11569438 | Magnetoresistive random-access memory device | Alexander Reznicek, Matthias Georg Gottwald, Bruce B. Doris | 2023-01-31 |
| 11563082 | Reduction of drain leakage in nanosheet device | Takashi Ando, Alexander Reznicek, Ruilong Xie | 2023-01-24 |