PS

Puneet Harischandra Suvarna

Globalfoundries: 18 patents #182 of 4,424Top 5%
GU Globalfoundries U.S.: 1 patents #344 of 665Top 55%
IBM: 1 patents #44,794 of 70,183Top 65%
📍 Menands, NY: #4 of 30 inventorsTop 15%
🗺 New York: #6,964 of 115,490 inventorsTop 7%
Overall (All Time): #221,078 of 4,157,543Top 6%
20
Patents All Time

Issued Patents All Time

Showing 1–20 of 20 patents

Patent #TitleCo-InventorsDate
11038092 Fin-based devices based on the thermoelectric effect Philipp Steinmann 2021-06-15
10943992 Transistor having straight bottom spacers Kangguo Cheng, Christopher J. Waskiewicz, Michael P. Belyansky, Brent A. Anderson, Muthumanickam Sankarapandian +1 more 2021-03-09
10784171 Vertically stacked complementary-FET device with independent gate control Julien Frougier, Ruilong Xie 2020-09-22
10510622 Vertically stacked complementary-FET device with independent gate control Julien Frougier, Ruilong Xie 2019-12-17
10497798 Vertical field effect transistor with self-aligned contacts Ruilong Xie, Steven Bentley, Chanro Park, Min Gyu Sung, Lars Liebmann +2 more 2019-12-03
10446659 Negative capacitance integration through a gate contact Steven Bentley, Rohit Galatage 2019-10-15
10418449 Circuits based on complementary field-effect transistors Bipul C. Paul, Ruilong Xie 2019-09-17
10347745 Methods of forming bottom and top source/drain regions on a vertical transistor device Steven Bentley, Daniel Chanemougame 2019-07-09
10332969 Negative capacitance matching in gate electrode structures Rohit Galatage, Steven Bentley, Zoran Krivokapic 2019-06-25
10312154 Method of forming vertical FinFET device having self-aligned contacts Ruilong Xie, Steven Bentley, Chanro Park, Min Gyu Sung, Lars Liebmann +2 more 2019-06-04
10304833 Method of forming complementary nano-sheet/wire transistor devices with same depth contacts Bipul C. Paul, Ruilong Xie, Bartlomiej Jan Pawlak, Lars Liebmann, Daniel Chanemougame +2 more 2019-05-28
10256158 Insulated epitaxial structures in nanosheet complementary field effect transistors Julien Frougier, Ruilong Xie, Steven Bentley 2019-04-09
10236379 Vertical FET with self-aligned source/drain regions and gate length based on channel epitaxial growth process Steven Bentley, Julien Frougier, Bartlomiej Jan Pawlak 2019-03-19
10236292 Complementary FETs with wrap around contacts and methods of forming same Julien Frougier, Ruilong Xie, Hiroaki Niimi, Steven Bentley, Ali Razavieh 2019-03-19
10192867 Complementary FETs with wrap around contacts and method of forming same Julien Frougier, Ruilong Xie, Hiroaki Niimi, Steven Bentley, Ali Razavieh 2019-01-29
10170617 Vertical transport field effect transistors Jiseok Kim, Hiroaki Niimi, Hoon Kim, Steven Bentley, Jody A. Fronheiser 2019-01-01
10157794 Integrated circuit structure with stepped epitaxial region Steven Bentley, Mark V. Raymond, Peter M. Zeitzoff 2018-12-18
10141414 Negative capacitance matching in gate electrode structures Rohit Galatage, Steven Bentley, Zoran Krivokapic 2018-11-27
10121702 Methods, apparatus and system for forming source/drain contacts using early trench silicide cut Chanro Park, Min Gyu Sung, Ruilong Xie 2018-11-06
9947789 Vertical transistors stressed from various directions 2018-04-17