Issued Patents All Time
Showing 1–25 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12339494 | Edge couplers with a fine-alignment mechanism | Oscar D. Restrepo, Koushik Ramachandran, Yusheng Bian, Eduardo Cruz Silva | 2025-06-24 |
| 12265255 | Electro-absorption modulators with stacked waveguide tapers | Yusheng Bian, Steven M. Shank, Judson R. Holt, Michal Rakowski | 2025-04-01 |
| 12001056 | Light coupling between stacked photonics chips | Michal Rakowski, Yusheng Bian | 2024-06-04 |
| 11774689 | Photonics chips and semiconductor products having angled optical fibers | Nicholas A. Polomoff | 2023-10-03 |
| 11768153 | Optical ring resonator-based microfluidic sensor | Michal Rakowski | 2023-09-26 |
| 11474383 | Optical power modulators based on total internal reflection | Yusheng Bian | 2022-10-18 |
| 11387350 | Semiconductor fin structure and method of fabricating the same | Geert Eneman, Liesbeth Witters, Geoffrey Pourtois | 2022-07-12 |
| 11145349 | Physically unclonable function architecture including memory cells with parallel-connected access transistors and common write wordlines | Christian Witt | 2021-10-12 |
| 11069830 | Quantum-confined stark effect (QCSE) modulator and photonics structure incorporating the QCSE modulator | Clement Porret, Srinivasan Ashwyn Srinivasan | 2021-07-20 |
| 10770440 | Micro-LED display assembly | Luke England | 2020-09-08 |
| 10658388 | Methods of forming stacked SOI semiconductor devices with back bias mechanism | — | 2020-05-19 |
| 10580897 | Methods of forming a bulk field effect transistor (FET) with sub-source/drain isolation layers and the resulting structures | — | 2020-03-03 |
| 10453750 | Stacked elongated nanoshapes of different semiconductor materials and structures that incorporate the nanoshapes | Guillaume Bouche, Ajey Poovannummoottil Jacob | 2019-10-22 |
| 10340369 | Tunneling field effect transistor | — | 2019-07-02 |
| 10340290 | Stacked SOI semiconductor devices with back bias mechanism | — | 2019-07-02 |
| 10304833 | Method of forming complementary nano-sheet/wire transistor devices with same depth contacts | Puneet Harischandra Suvarna, Bipul C. Paul, Ruilong Xie, Lars Liebmann, Daniel Chanemougame +2 more | 2019-05-28 |
| 10236379 | Vertical FET with self-aligned source/drain regions and gate length based on channel epitaxial growth process | Steven Bentley, Puneet Harischandra Suvarna, Julien Frougier | 2019-03-19 |
| 10134901 | Methods of forming a bulk field effect transistor (FET) with sub-source/drain isolation layers and the resulting structures | — | 2018-11-20 |
| 10128114 | Amorphization induced metal-silicon contact formation | — | 2018-11-13 |
| 10090227 | Back biasing in SOI FET technology | Luke England | 2018-10-02 |
| 10056453 | Semiconductor wafers with reduced bow and warpage | Ajey Poovannummoottil Jacob, Srinivasa Banna, Deepak Nayak | 2018-08-21 |
| 10020395 | Semiconductor device with gate inside U-shaped channel and methods of making such a device | — | 2018-07-10 |
| 9978836 | Nanostructure field-effect transistors with enhanced mobility source/drain regions | — | 2018-05-22 |
| 9824933 | Stacked vertical-transport field-effect transistors | — | 2017-11-21 |
| 9793384 | Tunneling field effect transistor and methods of making such a transistor | — | 2017-10-17 |