| 12393214 |
Device design for short-circuit protection of transistors |
James Richmond, Edward Robert Van Brunt |
2025-08-19 |
|
| 12283534 |
Power semiconductor devices with improved overcoat adhesion and/or protection |
In-Hwan Ji, Jae Hyung Park |
2025-04-22 |
|
| 11721755 |
Methods of forming semiconductor power devices having graded lateral doping |
Edward Robert Van Brunt, Jae Hyung Park, Vaishno Dasika |
2023-08-08 |
$54,015,000 |
| 11579645 |
Device design for short-circuitry protection circuitry within transistors |
James Richmond, Edward Robert Van Brunt |
2023-02-14 |
$76,953,000 |
| 11282951 |
Semiconductor power devices having graded lateral doping in the source region |
Edward Robert Van Brunt, Jae Hyung Park, Vaishno Dasika |
2022-03-22 |
$85,948,000 |
| 11038092 |
Fin-based devices based on the thermoelectric effect |
Puneet Harischandra Suvarna |
2021-06-15 |
|
| 10643885 |
FDSOI channel control by implanted high-k buried oxide |
Peter Javorka |
2020-05-05 |
$25,055,000 |
| 10049917 |
FDSOI channel control by implanted high-K buried oxide |
Peter Javorka |
2018-08-14 |
$10,336,000 |
| 9583596 |
Drain extended CMOS with counter-doped drain extension |
Amitava Chatterjee, Sameer Pendharkar |
2017-02-28 |
$12,848,000 |
| 9231054 |
Drain extended CMOS with counter-doped drain extension |
Amitava Chatterjee, Sameer Pendharkar |
2016-01-05 |
$10,710,000 |
| 8932942 |
Method of forming an electrical contact between a support wafer and the surface of a top silicon layer of a silicon-on-insulator wafer and an electrical device including such an electrical contact |
Manfred Schiekofer, Michael Kraus, Thomas Scharnagl, Wolfgang Schwartz |
2015-01-13 |
$22,709,000 |
| 8847359 |
High voltage bipolar transistor and method of fabrication |
Scott Balster, Hiroshi Yasuda, Badih El-Kareh |
2014-09-30 |
$10,935,000 |
| 8592900 |
Drain extended CMOS with counter-doped drain extension |
Amitava Chatterjee, Sameer Pendharkar |
2013-11-26 |
$16,791,000 |
| 8277763 |
Incubator apparatus and method |
Gabriela Juárez Martinez |
2012-10-02 |
|
| 8012844 |
Method of manufacturing an integrated circuit |
Christoph Dirnecker, Badih El-Kareh |
2011-09-06 |
$6,386,000 |
| 7670890 |
Silicide block isolated junction field effect transistor source, drain and gate |
Badih El-Kareh, Hiroshi Yasuda, Scott Balster, Joe R. Trogolo |
2010-03-02 |
$8,758,000 |
| 7615425 |
Open source/drain junction field effect transistor |
Joe R. Trogolo, Hiroshi Yasuda, Badih El-Kareh |
2009-11-10 |
$27,058,000 |
| 7498639 |
Integrated BiCMOS semiconductor circuit |
Scott Balster, Badih El-Kareh, Thomas Scharnagl, Michael Schmitt |
2009-03-03 |
$8,492,000 |
| 7422972 |
On chip heating for electrical trimming of polysilicon and polysilicon-silicon-germanium resistors and electrically programmable fuses for integrated circuits |
Jeffrey A. Babcock, Angelo Pinto, Gregory E. Howard, Scott Balster |
2008-09-09 |
$11,018,000 |
| 7403094 |
Thin film resistor and dummy fill structure and method to improve stability and reduce self-heating |
Eric Beach, Walter B. Meinel |
2008-07-22 |
$4,786,000 |
| 7403095 |
Thin film resistor structure and method of fabricating a thin film resistor structure |
Brian Vialpando, Eric Beach |
2008-07-22 |
$4,786,000 |
| 7217322 |
Method of fabricating an epitaxial silicon-germanium layer and an integrated semiconductor device comprising an epitaxial arsenic in-situ doped silicon-germanium layer |
Jeffrey A. Babcock, Scott Balster, Alfred Haeusler, Angelo Pinto, Manfred Schiekofer +1 more |
2007-05-15 |
$13,934,000 |
| 7208388 |
Thin film resistor head structure and method for reducing head resistivity variance |
Eric Beach |
2007-04-24 |
$15,053,000 |
| 7192838 |
Method of producing complementary SiGe bipolar transistors |
Scott Balster, Badih El-Kareh, Thomas Scharnagl |
2007-03-20 |
$12,265,000 |
| 7144789 |
Method of fabricating complementary bipolar transistors with SiGe base regions |
Badih El-Kareh, Scott Balster, Thomas Scharnagl, Manfred Schiekofer, Carl Willis |
2006-12-05 |
$15,699,000 |
