| 11929325 |
Mixed pitch track pattern |
Luca MATTII, Sidharth Rastogi, Ranganayakulu Konduri, Gerard Baldwin |
2024-03-12 |
$19,478,000 |
| 9123570 |
Integration scheme for changing crystal orientation in hybrid orientation technology (HOT) using direct silicon bonded (DSB) substrates |
Frank Scott Johnson, Benjamin P. McKee, Shaofeng Yu |
2015-09-01 |
$8,975,000 |
| 9053966 |
Integrated circuits with aligned (100) NMOS and (110) PMOS finFET sidewall channels |
Weize Xiong, Cloves Rinn Cleavelin, Rick L. Wise |
2015-06-09 |
$10,012,000 |
| 8872220 |
Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels |
Weize Xiong, Cloves Rinn Cleavelin, Rick L. Wise |
2014-10-28 |
$12,774,000 |
| 8846487 |
Reduction of STI corner defects during SPE in semiconductor device fabrication using DSB substrate and hot technology |
Periannan Chidambaram, Rick L. Wise |
2014-09-30 |
$10,935,000 |
| 8703568 |
Advanced CMOS using super steep retrograde wells |
Jeffrey A. Babcock, Scott Balster, Alfred Haeusler, Gregory E. Howard |
2014-04-22 |
$8,414,000 |
| 8558318 |
Integration scheme for changing crystal orientation in hybrid orientation technology (HOT) using direct silicon bonded (DSB) substrates |
Frank Scott Johnson, Benjamin P. McKee, Shaofeng Yu |
2013-10-15 |
$10,459,000 |
| 8410519 |
Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels |
Weize Xiong, Cloves Rinn Cleavelin, Rick L. Wise |
2013-04-02 |
$8,636,000 |
| 8247300 |
Control of dopant diffusion from buried layers in bipolar integrated circuits |
Jeffrey A. Babcock, Manfred Schiekofer, Scott Balster, Gregory E. Howard, Alfred Hausler |
2012-08-21 |
$8,733,000 |
| 8138035 |
Method for forming integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels |
Weize Xiong, Cloves Rinn Cleavelin, Rick L. Wise |
2012-03-20 |
$6,746,000 |
| 8129246 |
Advanced CMOS using super steep retrograde wells |
Jeffrey A. Babcock, Scott Balster, Alfred Haeusler, Gregory E. Howard |
2012-03-06 |
$7,446,000 |
| 8043947 |
Method to eliminate re-crystallization border defects generated during solid phase epitaxy of a DSB substrate |
Weize Xiong, Manfred Ramin |
2011-10-25 |
$4,961,000 |
| 7943479 |
Integration of high-k metal gate stack into direct silicon bonding (DSB) hybrid orientation technology (HOT) pMOS process flow |
Manuel Quevedo-Lopez |
2011-05-17 |
$6,590,000 |
| 7943451 |
Integration scheme for reducing border region morphology in hybrid orientation technology (HOT) using direct silicon bonded (DSB) substrates |
Frank Scott Johnson |
2011-05-17 |
$6,590,000 |
| 7897994 |
Method of making (100) NMOS and (110) PMOS sidewall surface on the same fin orientation for multiple gate MOSFET with DSB substrate |
Weize Xiong, Cloves Rinn Cleavelin, Rick L. Wise |
2011-03-01 |
$7,861,000 |
| 7897447 |
Use of in-situ HCL etch to eliminate by oxidation recrystallization border defects generated during solid phase epitaxy (SPE) in the fabrication of nano-scale CMOS transistors using direct silicon bond substrate (DSB) and hybrid orientation technology (HOT) |
— |
2011-03-01 |
$7,861,000 |
| 7892908 |
Integration scheme for changing crystal orientation in hybrid orientation technology (HOT) using direct silicon bonded (DSB) substrates |
Frank Scott Johnson, Benjamin P. McKee, Shaofeng Yu |
2011-02-22 |
$5,235,000 |
| 7883977 |
Advanced CMOS using super steep retrograde wells |
Jeffrey A. Babcock, Scott Balster, Alfred Haeusler, Gregory E. Howard |
2011-02-08 |
$6,207,000 |
| 7855111 |
Border region defect reduction in hybrid orientation technology (HOT) direct silicon bonded (DSB) substrates |
Haowen Bu, Shaofeng Yu, Ajith Varghese |
2010-12-21 |
$13,762,000 |
| 7767510 |
Semiconductor device made by the method of producing hybrid orientnation (100) strained silicon with (110) silicon |
Rick L. Wise |
2010-08-03 |
$11,414,000 |
| 7655523 |
Advanced CMOS using super steep retrograde wells |
Jeffrey A. Babcock, Scott Balster, Alfred Haeusler, Gregory E. Howard |
2010-02-02 |
$11,818,000 |
| 7642197 |
Method to improve performance of secondary active components in an esige CMOS technology |
Periannan Chidambaram |
2010-01-05 |
$10,620,000 |
| 7501324 |
Advanced CMOS using super steep retrograde wells |
Jeffrey A. Babcock, Scott Balster, Alfred Haeusler, Gregory E. Howard |
2009-03-10 |
$12,181,000 |
| 7422972 |
On chip heating for electrical trimming of polysilicon and polysilicon-silicon-germanium resistors and electrically programmable fuses for integrated circuits |
Jeffrey A. Babcock, Gregory E. Howard, Philipp Steinmann, Scott Balster |
2008-09-09 |
$11,018,000 |
| 7217322 |
Method of fabricating an epitaxial silicon-germanium layer and an integrated semiconductor device comprising an epitaxial arsenic in-situ doped silicon-germanium layer |
Jeffrey A. Babcock, Scott Balster, Alfred Haeusler, Manfred Schiekofer, Philipp Steinmann +1 more |
2007-05-15 |
$13,934,000 |
