Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9053966 | Integrated circuits with aligned (100) NMOS and (110) PMOS finFET sidewall channels | Cloves Rinn Cleavelin, Angelo Pinto, Rick L. Wise | 2015-06-09 |
| 8872220 | Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels | Cloves Rinn Cleavelin, Angelo Pinto, Rick L. Wise | 2014-10-28 |
| 8581317 | SOI MuGFETs having single gate electrode level | Howard L. Tigelaar, Cloves Rinn Cleavelin, Andrew Marshall | 2013-11-12 |
| 8470707 | Silicide method | Deborah J. Riley | 2013-06-25 |
| 8410519 | Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels | Cloves Rinn Cleavelin, Angelo Pinto, Rick L. Wise | 2013-04-02 |
| 8377772 | CMOS integration method for optimal IO transistor VT | Greg Baldwin | 2013-02-19 |
| 8138035 | Method for forming integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels | Cloves Rinn Cleavelin, Angelo Pinto, Rick L. Wise | 2012-03-20 |
| 8114727 | Disposable spacer integration with stress memorization technique and silicon-germanium | Zhiqiang Wu, Xin Wang | 2012-02-14 |
| 8067792 | Memory device with memory cell including MuGFET and FIN capacitor | Andrew Marshall, Cloves Rinn Cleavelin, Howard L. Tigelaar | 2011-11-29 |
| 8043947 | Method to eliminate re-crystallization border defects generated during solid phase epitaxy of a DSB substrate | Angelo Pinto, Manfred Ramin | 2011-10-25 |
| 7960234 | Multiple-gate MOSFET device and associated manufacturing methods | Craig Huffman, Cloves Rinn Cleavelin | 2011-06-14 |
| 7939393 | Method of adjusting FDSOI threshold voltage through oxide charges generation in the buried oxide | Cloves Rinn Cleavelin | 2011-05-10 |
| 7897994 | Method of making (100) NMOS and (110) PMOS sidewall surface on the same fin orientation for multiple gate MOSFET with DSB substrate | Cloves Rinn Cleavelin, Angelo Pinto, Rick L. Wise | 2011-03-01 |
| 7683417 | Memory device with memory cell including MuGFET and fin capacitor | Andrew Marshall, Cloves Rinn Cleavelin, Howard L. Tigelaar | 2010-03-23 |
| 7638843 | Integrating high performance and low power multi-gate devices | Cloves Rinn Cleavelin | 2009-12-29 |
| 7582521 | Dual metal gates for mugfet device | Husam N. Alshareef | 2009-09-01 |
| 7253043 | Short channel semiconductor device fabrication | Jean-Pierre Colinge | 2007-08-07 |
| 7238567 | System and method for integrating low schottky barrier metal source/drain | — | 2007-07-03 |
| 7094650 | Gate electrode for FinFET device | Nirmal Chaudhary, Thomas Schulz, Craig Huffman | 2006-08-22 |