Issued Patents All Time
Showing 1–25 of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10229922 | Methods of forming memory devices with isolation structures | Leonard Forbes | 2019-03-12 |
| 9583195 | Systems, methods and devices for a memory having a buried select line | — | 2017-02-28 |
| 9553177 | Vertically base-connected bipolar transistor | Leonard Forbes, Kie Y. Ahn | 2017-01-24 |
| 9361981 | Methods of forming and programming memory devices with isolation structures | Leonard Forbes | 2016-06-07 |
| 9076835 | Vertically base-connected bipolar transistor | Leonard Forbes, Kie Y. Ahn | 2015-07-07 |
| 9076662 | Fin-JFET | Leonard Forbes | 2015-07-07 |
| 8847359 | High voltage bipolar transistor and method of fabrication | Scott Balster, Hiroshi Yasuda, Philipp Steinmann | 2014-09-30 |
| 8654592 | Memory devices with isolation structures | Leonard Forbes | 2014-02-18 |
| 8618633 | Semiconductor-on-insulator apparatus, device and system with buried decoupling capacitors | — | 2013-12-31 |
| 8530952 | Systems, methods and devices for a memory having a buried select line | — | 2013-09-10 |
| 8502280 | Fin-JFET | Leonard Forbes | 2013-08-06 |
| 8450179 | Semiconductor device having a first bipolar device and a second bipolar device and method for fabrication | Hiroshi Yasuda, Scott Balster | 2013-05-28 |
| 8415720 | Vertically pinched junction field effect transistor | Kyu Ok LEE, Joo Hyung Kim, Jung Joo Kim | 2013-04-09 |
| 8409959 | Vertically base-connected bipolar transistor | Leonard Forbes, Kie Y. Ahn | 2013-04-02 |
| 8294218 | Method of fabricating an integrated circuit with gate self-protection, and an integrated circuit with gate self-protection | Scott Balster, Hiroshi Yasuda, Manfred Schiekofer | 2012-10-23 |
| 8114753 | Buried decoupling capacitors, devices and systems including same, and methods of fabrication | — | 2012-02-14 |
| 8012844 | Method of manufacturing an integrated circuit | Christoph Dirnecker, Philipp Steinmann | 2011-09-06 |
| 8012842 | Method for fabricating isolated integrated semiconductor structures | Scott Balster, Hiroshi Yasuda | 2011-09-06 |
| 7927938 | Fin-JFET | Leonard Forbes | 2011-04-19 |
| 7880267 | Buried decoupling capacitors, devices and systems including same, and methods of fabrication | — | 2011-02-01 |
| 7772057 | Method of fabricating an integrated circuit with gate self-protection, and an integrated circuit with gate self-protection | Scott Balster, Hiroshi Yasuda, Manfred Schiekofer | 2010-08-10 |
| 7670890 | Silicide block isolated junction field effect transistor source, drain and gate | Hiroshi Yasuda, Scott Balster, Philipp Steinmann, Joe R. Trogolo | 2010-03-02 |
| 7615425 | Open source/drain junction field effect transistor | Joe R. Trogolo, Hiroshi Yasuda, Philipp Steinmann | 2009-11-10 |
| 7498639 | Integrated BiCMOS semiconductor circuit | Philipp Steinmann, Scott Balster, Thomas Scharnagl, Michael Schmitt | 2009-03-03 |
| 7312119 | Stacked capacitor and method of fabricating same | Scott Balster, Philipp Steinman, Christoph Dirnecker | 2007-12-25 |