Issued Patents All Time
Showing 26–50 of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7217322 | Method of fabricating an epitaxial silicon-germanium layer and an integrated semiconductor device comprising an epitaxial arsenic in-situ doped silicon-germanium layer | Jeffrey A. Babcock, Scott Balster, Alfred Haeusler, Angelo Pinto, Manfred Schiekofer +1 more | 2007-05-15 |
| 7192838 | Method of producing complementary SiGe bipolar transistors | Philipp Steinmann, Scott Balster, Thomas Scharnagl | 2007-03-20 |
| 7144789 | Method of fabricating complementary bipolar transistors with SiGe base regions | Scott Balster, Philipp Steinmann, Thomas Scharnagl, Manfred Schiekofer, Carl Willis | 2006-12-05 |
| 7130182 | Stacked capacitor and method for fabricating same | Scott Balster, Philipp Steinmann, Christoph Dirnecker | 2006-10-31 |
| 7118981 | Method of fabricating an integrated silicon-germanium heterobipolar transistor and an integrated silicon-germanium heterobipolar transistor | Alfred Haeusler, Philipp Steinmann, Scott Balster | 2006-10-10 |
| 6426544 | Flexible interconnections with dual-metal dual-stud structure | James G. Ryan | 2002-07-30 |
| 6144037 | Capacitor charging sensor | James G. Ryan, Auguste B. El-Kareh | 2000-11-07 |
| 6114736 | Controlled dopant diffusion and metal contamination in thin polycide gate conductor of MOSFET device | Karanam Balasubramanyam, Stephen Bruce Brodsky, Richard A. Conti | 2000-09-05 |
| 6087225 | Method for dual gate oxide dual workfunction CMOS | Gary B. Bronner, Stanley E. Schuster | 2000-07-11 |
| 6057188 | Trench capacitor structures | Richard L. Kleinhenz, Stanley E. Schuster | 2000-05-02 |
| 6022781 | Method for fabricating a MOSFET with raised STI isolation self-aligned to the gate stack | Wendell P. Noble, Ashwin K. Ghatalia | 2000-02-08 |
| 6008083 | Precision analog metal-metal capacitor | Terry J. Brabazon, Stuart R. Martin, Matthew J. Rutten, Carter W. Kaanta | 1999-12-28 |
| 5972788 | Method of making flexible interconnections with dual-metal-dual-stud structure | James G. Ryan | 1999-10-26 |
| 5933718 | Method for electrostatic discharge protection through electric field emission | Jack A. Mandelman, James G. Ryan | 1999-08-03 |
| 5923999 | Method of controlling dopant diffusion and metal contamination in thin polycide gate conductor of mosfet device | Karanam Balasubramanyam, Stephen Bruce Brodsky, Richard A. Conti | 1999-07-13 |
| 5889410 | Floating gate interlevel defect monitor and method | Stephen A. Parke | 1999-03-30 |
| 5805494 | Trench capacitor structures | Richard L. Kleinhenz, Stanley E. Schuster | 1998-09-08 |
| 5763918 | ESD structure that employs a schottky-barrier to reduce the likelihood of latch-up | James G. Ryan, Hiroyoshi Tanimoto | 1998-06-09 |
| 5708559 | Precision analog metal-metal capacitor | Terry J. Brabazon, Stuart R. Martin, Matthew J. Rutten, Carter W. Kaanta | 1998-01-13 |
| 5539229 | MOSFET with raised STI isolation self-aligned to the gate stack | Wendell P. Noble, Jr, Ashwin K. Ghatalia | 1996-07-23 |
| 5418738 | Low voltage programmable storage element | Wagdi W. Abadeer, Wayne F. Ellis, Duane E. Galbi, Nathan R. Hiltebeitel, William R. Tonti +1 more | 1995-05-23 |
| 5334880 | Low voltage programmable storage element | Wagdi W. Abadeer, Wayne F. Ellis, Duane E. Galbi, Nathan R. Hiltebeitel, William R. Tonti +1 more | 1994-08-02 |
| 5273913 | High performance lateral PNP transistor with buried base contact | Sridhar Divakaruni, Eric Johnson | 1993-12-28 |
| 5198376 | Method of forming high performance lateral PNP transistor with buried base contact | Sridhar Divakaruni, Eric Johnson | 1993-03-30 |
| 4725562 | Method of making a contact to a trench isolated device | Richard R. Garnache, Ashwin K. Ghatalia | 1988-02-16 |