Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7750047 | Modulators (inhibitors/activators) of histone acetyltransferases | Tapas Kumar Kundu, Venkatesh Swaminathan | 2010-07-06 |
| 7402706 | Polyisoprenylated benzophenones and their isomers as inhibitors of histone acetyltransferases and uses thereof | Kundu Tapas Kumar, Kempegowda Mantelingu, Altaf Mohammad, Venkatesh Swaminathan, A. Varier Radhika | 2008-07-22 |
| 7332629 | Modulators (inhibitors/activators) of histone acetyltransferases | Tapas Kumar Kundu, Vankatesh Swaminathan | 2008-02-19 |
| 6884672 | Method for forming an electronic device | Serge Biesemans, Byeongju Park | 2005-04-26 |
| 6605521 | Method of forming an oxide film on a gate side wall of a gate structure | Atul Ajmera, Tomio Katata, Shang-Bin Ko | 2003-08-12 |
| 6395296 | Soluble double metal salt of group IA and IIA of hydroxycitric acid, process of preparing the same and its use in beverages and other food products without effecting their flavor and properties | Bhaskaran Chandrasekhar, Candadai Seshadri Ramadoss, Pillarisetti Venkata Subba Rao | 2002-05-28 |
| 6160172 | Soluble double metal salt of group IA and IIA of (-) hydroxycitric acid, process of preparing the same and its use in beverages and other food products without effecting their flavor and properties | Bhaskaran Chandrasekhar, Candadai Seshadri Ramadoss, Pillarisetti Venkata Subba Rao | 2000-12-12 |
| 6114736 | Controlled dopant diffusion and metal contamination in thin polycide gate conductor of MOSFET device | Stephen Bruce Brodsky, Richard A. Conti, Badih El-Kareh | 2000-09-05 |
| 6090671 | Reduction of gate-induced drain leakage in semiconductor devices | Martin Gall, Jeffrey P. Gambino, Jack A. Mandelman | 2000-07-18 |
| 5923999 | Method of controlling dopant diffusion and metal contamination in thin polycide gate conductor of mosfet device | Stephen Bruce Brodsky, Richard A. Conti, Badih El-Kareh | 1999-07-13 |
| 4808545 | High speed GaAs MESFET having refractory contacts and a self-aligned cold gate fabrication process | Robert R. Joseph, Robert B. Renbeck | 1989-02-28 |
| 4689113 | Process for forming planar chip-level wiring | Anthony J. Dally, Jacob Riseman, Seiki Ogura | 1987-08-25 |
| 4405710 | Ion beam exposure of (g-Ge.sub.x -Se.sub.1-x) inorganic resists | Arthur L. Ruoff | 1983-09-20 |